seL4/libsel4
julia 7f91e0c5f6 libsel4: fix riscv ASIDcontrol param descriptions
Nowhere else in the documentation uses the phrase

    "Must be a depth of 32"

which seems incorrect for 64-bit riscv.

Also, the index parameter had the same description as root, which
is incorrect.

Signed-off-by: julia <git.ts@trainwit.ch>
2025-02-12 11:00:03 +00:00
..
arch_include libsel4: fix riscv ASIDcontrol param descriptions 2025-02-12 11:00:03 +00:00
include hw debug api: aarch64 port 2024-07-18 16:09:52 +10:00
mode_include replacing all ifndef with pargma once 2020-03-23 11:04:46 +11:00
sel4_arch_include Fix TCB size on RISC-V 32-bit when FPU is enabled 2024-09-16 12:31:52 +01:00
sel4_plat_include Added initial support for Cheshire platform 2025-02-03 16:10:58 +11:00
src Enabled IPC debug features under new config 2020-04-06 14:21:46 +10:00
tools manual: params don't have errors 2024-06-30 21:14:32 +10:00
CMakeLists.txt libsel4: rename interface XML files 2024-06-30 18:28:12 +10:00