512a0200de
All the kernel header files now use pargma once rather than the ifndef, as the pre-processed C files do not change while header files are protected with pargma once. This will also solve any naming issues caused by ifndef.
92 lines
2.8 KiB
C
92 lines
2.8 KiB
C
/*
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* Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)
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*
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* SPDX-License-Identifier: GPL-2.0-only
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*/
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#pragma once
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#define TISR_MATCH_FLAG BIT(0)
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#define TISR_OVF_FLAG BIT(1)
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#define TISR_TCAR_FLAG BIT(2)
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/* Kernel uses DMTIMER4 */
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struct timer {
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uint32_t tidr; // 00h TIDR Identification Register
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uint32_t padding1[3];
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uint32_t cfg; // 10h TIOCP_CFG Timer OCP Configuration Register
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uint32_t padding2[3];
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uint32_t tieoi; // 20h IRQ_EOI Timer IRQ End-Of-Interrupt Register
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uint32_t tisrr; // 24h IRQSTATUS_RAW Timer IRQSTATUS Raw Register
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uint32_t tisr; // 28h IRQSTATUS Timer IRQSTATUS Register
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uint32_t tier; // 2Ch IRQSTATUS_SET Timer IRQENABLE Set Register
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uint32_t ticr; // 30h IRQSTATUS_CLR Timer IRQENABLE Clear Register
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uint32_t twer; // 34h IRQWAKEEN Timer IRQ Wakeup Enable Register
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uint32_t tclr; // 38h TCLR Timer Control Register
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uint32_t tcrr; // 3Ch TCRR Timer Counter Register
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uint32_t tldr; // 40h TLDR Timer Load Register
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uint32_t ttgr; // 44h TTGR Timer Trigger Register
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uint32_t twps; // 48h TWPS Timer Write Posted Status Register
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uint32_t tmar; // 4Ch TMAR Timer Match Register
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uint32_t tcar1; // 50h TCAR1 Timer Capture Register
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uint32_t tsicr; // 54h TSICR Timer Synchronous Interface Control Register
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uint32_t tcar2; // 58h TCAR2 Timer Capture Register
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};
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typedef volatile struct timer timer_t;
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extern timer_t *timer;
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#ifdef CONFIG_KERNEL_MCS
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extern uint32_t high_bits;
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/* Read the current time from the timer. */
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static inline ticks_t getCurrentTime(void)
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{
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bool_t overflow = !!(timer->tisr & TISR_OVF_FLAG);
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return ((((uint64_t) high_bits + overflow) << 32llu) + timer->tcrr);
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}
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#define HIGH_BYTES 0xffffffff00000000
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bool_t high_deadline = false;
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/* set the next deadline irq - deadline is absolute */
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static inline void setDeadline(ticks_t deadline)
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{
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/* Set the deadline in two parts */
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if ((deadline & HIGH_BYTES) != 0) {
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deadline = (deadline & HIGH_BYTES) >> 32;
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high_deadline = true;
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}
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assert((deadline & HIGH_BYTES) == 0);
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timer->tmar = (uint32_t)deadline;
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}
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/* ack previous deadline irq */
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static inline void ackDeadlineIRQ(void)
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{
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/* check if this is an overflow or match irq and ack */
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if (timer->tisr & TISR_OVF_FLAG) {
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high_bits++;
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timer->tisr = TISR_OVF_FLAG;
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assert((timer->tisr & TISR_OVF_FLAG) == 0);
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}
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if (timer->tisr & TISR_MATCH_FLAG) {
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if (high_deadline) {
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timer->tmar = 0xffffffff;
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high_deadline = false;
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}
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timer->tisr = TISR_MATCH_FLAG;
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assert((timer->tisr & TISR_MATCH_FLAG) == 0);
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}
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}
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#else /* CONFIG_KERNEL_MCS */
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static inline void resetTimer(void)
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{
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timer->tisr = TISR_OVF_FLAG | TISR_MATCH_FLAG | TISR_TCAR_FLAG;
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ackInterrupt(KERNEL_TIMER_IRQ);
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}
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#endif /* !CONFIG_KERNEL_MCS */
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