75f2c54b42
This is almost a complete rewrite from the old hardware_gen.py. It separates the 'parse DT' stage from the 'generate output' devices more strictly, and is hopefully easier to understand and easier to extend. We also no longer generate the 'devices' list (in YAML) or the dev_p_regs array (in C), as the kernel will implicitly expose all non-RAM untypeds as devices.
111 lines
3.9 KiB
Python
111 lines
3.9 KiB
Python
#
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# Copyright 2019, Data61
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# Commonwealth Scientific and Industrial Research Organisation (CSIRO)
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# ABN 41 687 119 230.
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#
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# This software may be distributed and modified according to the terms of
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# the GNU General Public License version 2. Note that NO WARRANTY is provided.
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# See "LICENSE_GPLv2.txt" for details.
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#
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# @TAG(DATA61_GPL)
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#
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import functools
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import hardware.utils as utils
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@functools.total_ordering
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class Region:
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''' Represents a region of memory. '''
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def __init__(self, base: int, size: int, owner: 'WrappedNode'):
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self.base = base
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self.size = size
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self.owner = owner
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@staticmethod
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def clone(other):
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ret = Region(other.base, other.size)
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return ret
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def __repr__(self):
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return 'Region(base=0x{:x},size=0x{:x})'.format(self.base, self.size)
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def __eq__(self, other):
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return self.base == other.base and self.size == other.size
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def __ne__(self, other):
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# Needed only for py2.
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return not self.__eq__(other)
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def __gt__(self, other):
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return self.base > other.base
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def __hash__(self):
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return hash((self.base, self.size))
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@staticmethod
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def from_range(start, end, owner):
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''' create a region from a start/end rather than start/size '''
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ret = Region(start, end - start, owner)
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return ret
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def overlaps(self, other):
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''' returns True if this region overlaps the given region '''
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# either our base is first, and to overlap our end must be > other.base
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if self.base <= other.base and (self.base + self.size) > other.base:
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return True
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# or other.base is first, and to overlap other's end must be > self.base
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elif other.base <= self.base and (other.base + other.size) > self.base:
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return True
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return False
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def reserve(self, excluded):
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''' returns an array of regions that represent this region
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minus the excluded range '''
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if not self.overlaps(excluded):
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return [Region(self.base, self.size, self.owner)]
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ret = []
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if self.base < excluded.base:
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# the first region is from our base to excluded.base
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ret.append(Region.from_range(self.base, excluded.base, self.owner))
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# skip the region from excluded.base - excluded.base + excluded.size
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# if there's anything left, add it.
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if (excluded.base + excluded.size) < (self.base + self.size):
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ret.append(Region.from_range(excluded.base + excluded.size,
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self.base + self.size, self.owner))
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else: # self.base >= excluded.base
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# we skip the first chunk
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# we add what's left after the current chunk.
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if (self.base + self.size) > (excluded.base + excluded.size):
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ret.append(Region.from_range(excluded.base + excluded.size,
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self.base + self.size, self.owner))
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return ret
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def align_base(self, align_bits):
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''' align this region up to a given number of bits '''
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new_base = utils.align_up(self.base, align_bits)
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diff = new_base - self.base
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new_size = self.size - diff
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new = Region(new_base, new_size, self.owner)
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return new
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def align_size(self, align_bits):
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''' align this region's size to a given number of bits.
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will move the base address down and the region's size
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up '''
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new_base = utils.align_down(self.base, align_bits)
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new_size = utils.align_up(self.size, align_bits)
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new = Region(new_base, new_size, self.owner)
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return new
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def make_chunks(self, chunksz):
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base = self.base
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size = self.size
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ret = []
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while size > 0:
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ret.append(Region(base, min(size, chunksz), self.owner))
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base += chunksz
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size -= chunksz
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return ret
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