8639dbcaea
This removes an #ifdef for x86-64 that was in generic code by declaring the generic mechanism that is being used as an Arch_ function
121 lines
3.3 KiB
C
121 lines
3.3 KiB
C
/*
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* Copyright 2014, General Dynamics C4 Systems
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*
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* This software may be distributed and modified according to the terms of
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* the GNU General Public License version 2. Note that NO WARRANTY is provided.
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* See "LICENSE_GPLv2.txt" for details.
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*
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* @TAG(GD_GPL)
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*/
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#ifndef __KERNEL_THREAD_H
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#define __KERNEL_THREAD_H
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#include <types.h>
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#include <util.h>
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#include <object/structures.h>
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#include <arch/machine.h>
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static inline CONST word_t
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ready_queues_index(word_t dom, word_t prio)
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{
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if (CONFIG_NUM_DOMAINS > 1) {
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return dom * CONFIG_NUM_PRIORITIES + prio;
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} else {
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assert(dom == 0);
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return prio;
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}
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}
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static inline CONST word_t
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prio_to_l1index(word_t prio)
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{
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return (prio >> wordRadix);
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}
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static inline CONST word_t
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l1index_to_prio(word_t l1index)
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{
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return (l1index << wordRadix);
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}
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static inline bool_t PURE
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isRunnable(const tcb_t *thread)
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{
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switch (thread_state_get_tsType(thread->tcbState)) {
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case ThreadState_Running:
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case ThreadState_Restart:
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#ifdef CONFIG_VTX
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case ThreadState_RunningVM:
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#endif
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return true;
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default:
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return false;
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}
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}
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static inline CONST word_t
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invert_l1index(word_t l1index)
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{
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word_t inverted = (L2_BITMAP_SIZE - 1 - l1index);
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assert(inverted < L2_BITMAP_SIZE);
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return inverted;
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}
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static inline prio_t
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getHighestPrio(word_t dom)
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{
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word_t l1index;
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word_t l2index;
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word_t l1index_inverted;
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/* it's undefined to call clzl on 0 */
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assert(NODE_STATE(ksReadyQueuesL1Bitmap)[dom] != 0);
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l1index = wordBits - 1 - clzl(NODE_STATE(ksReadyQueuesL1Bitmap)[dom]);
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l1index_inverted = invert_l1index(l1index);
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assert(NODE_STATE(ksReadyQueuesL2Bitmap)[dom][l1index_inverted] != 0);
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l2index = wordBits - 1 - clzl(NODE_STATE(ksReadyQueuesL2Bitmap)[dom][l1index_inverted]);
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return (l1index_to_prio(l1index) | l2index);
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}
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static inline bool_t
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isHighestPrio(word_t dom, prio_t prio)
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{
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return NODE_STATE(ksReadyQueuesL1Bitmap)[dom] == 0 ||
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prio >= getHighestPrio(dom);
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}
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void configureIdleThread(tcb_t *tcb);
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void activateThread(void);
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void suspend(tcb_t *target);
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void restart(tcb_t *target);
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void doIPCTransfer(tcb_t *sender, endpoint_t *endpoint,
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word_t badge, bool_t grant, tcb_t *receiver);
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void doReplyTransfer(tcb_t *sender, tcb_t *receiver, cte_t *slot);
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void doNormalTransfer(tcb_t *sender, word_t *sendBuffer, endpoint_t *endpoint,
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word_t badge, bool_t canGrant, tcb_t *receiver,
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word_t *receiveBuffer);
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void doFaultTransfer(word_t badge, tcb_t *sender, tcb_t *receiver,
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word_t *receiverIPCBuffer);
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void doNBRecvFailedTransfer(tcb_t *thread);
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void schedule(void);
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void chooseThread(void);
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void switchToThread(tcb_t *thread);
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void switchToIdleThread(void);
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void setDomain(tcb_t *tptr, dom_t dom);
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void setPriority(tcb_t *tptr, prio_t prio);
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void setMCPriority(tcb_t *tptr, prio_t mcp);
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void scheduleTCB(tcb_t *tptr);
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void possibleSwitchTo(tcb_t *tptr);
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void setThreadState(tcb_t *tptr, _thread_state_t ts);
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void timerTick(void);
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void rescheduleRequired(void);
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/* declare that the thread has had its registers (in its user_context_t) modified and it
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* should ignore any 'efficient' restores next time it is run, and instead restore all
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* registers into their correct place */
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void Arch_postModifyRegisters(tcb_t *tptr);
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#endif
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