122 lines
3.4 KiB
Text
122 lines
3.4 KiB
Text
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% Copyright 2014, General Dynamics C4 Systems
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%
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% This software may be distributed and modified according to the terms of
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% the GNU General Public License version 2. Note that NO WARRANTY is provided.
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% See "LICENSE_GPLv2.txt" for details.
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%
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% @TAG(GD_GPL)
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%
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This module defines the machine-specific invocations for the ARM.
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\begin{impdetails}
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This module makes use of the GHC extension allowing data types with no constructors.
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> {-# LANGUAGE EmptyDataDecls #-}
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\end{impdetails}
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> module SEL4.API.Invocation.ARM where
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\begin{impdetails}
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> import SEL4.Machine
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> import SEL4.Machine.Hardware.ARM hiding (PAddr)
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> import SEL4.Object.Structures
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\end{impdetails}
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\subsection{ARM-Specific Objects}
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There are five ARM-specific object types; however, only four of them may be invoked. These are the page table, page, ASID control, and ASID pool objects.
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> data Invocation
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> = InvokePageTable PageTableInvocation
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> | InvokePageDirectory PageDirectoryInvocation
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> | InvokePage PageInvocation
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> | InvokeASIDControl ASIDControlInvocation
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> | InvokeASIDPool ASIDPoolInvocation
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> deriving Show
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> data PageTableInvocation
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> = PageTableMap {
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> ptMapCap :: Capability,
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> ptMapCTSlot :: PPtr CTE,
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> ptMapPDE :: PDE,
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> ptMapPDSlot :: PPtr PDE }
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> | PageTableUnmap {
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> ptUnmapCap :: ArchCapability,
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> ptUnmapCapSlot :: PPtr CTE }
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> deriving Show
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> data PageDirectoryInvocation
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> = PageDirectoryFlush {
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> pdFlushType :: FlushType,
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> pdFlushStart :: VPtr,
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> pdFlushEnd :: VPtr,
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> pdFlushPStart :: PAddr,
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> pdFlushPD :: PPtr PDE,
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> pdFlushASID :: ASID }
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> | PageDirectoryNothing
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> deriving Show
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> -- FIXME: should we consolidate start, end into a tuple
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> data PageInvocation
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> = PageMap {
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> pageMapASID :: ASID,
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> pageMapCap :: Capability,
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> pageMapCTSlot :: PPtr CTE,
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> pageMapEntries :: Either (PTE, [PPtr PTE]) (PDE, [PPtr PDE]) }
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> | PageRemap {
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> pageRemapASID :: ASID,
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> pageRemapEntries :: Either (PTE, [PPtr PTE]) (PDE, [PPtr PDE]) }
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> | PageUnmap {
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> pageUnmapCap :: ArchCapability,
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> pageUnmapCapSlot :: PPtr CTE }
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> | PageFlush {
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> pageFlushType :: FlushType,
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> pageFlushStart :: VPtr,
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> pageFlushEnd :: VPtr,
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> pageFlushPStart :: PAddr,
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> pageFlushPD :: PPtr PDE,
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> pageFlushASID :: ASID }
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> | PageGetAddr {
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> pageGetBasePtr :: PPtr Word }
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> deriving Show
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> data FlushType
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> = Clean | Invalidate | CleanInvalidate | Unify
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> deriving Show
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> data ASIDControlInvocation
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> = MakePool {
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> makePoolFrame :: PPtr (),
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> makePoolSlot :: PPtr CTE,
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> makePoolParent :: PPtr CTE,
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> makePoolBase :: ASID }
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> deriving Show
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> data ASIDPoolInvocation
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> = Assign {
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> assignASID :: ASID,
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> assignASIDPool :: PPtr ASIDPool,
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> assignASIDCTSlot :: PPtr CTE }
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> deriving Show
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\subsection{Interrupt Control}
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The ARM platform presently does not require any additional interrupt control calls.
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> data InterruptControl
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> instance Show InterruptControl
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\subsection{Additional Register Subsets}
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The ARM platform currently does not define any additional register sets for the "CopyRegisters" operation. This may be changed in future to support a floating point unit.
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> data CopyRegisterSets = ARMNoExtraRegisters
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> deriving Show
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