Fábio Coutada
9540b0528c
Phase B (Core Device Support) — all drivers verified in QEMU: - Network: virtio-net cleanup, RTL8139, E1000, clause-22 MDIO PHY management, CAN bus, industrial protocols (Modbus/Profibus/EtherCAT), controller probe+dispatch - Block storage: RAM disk backend (write->read->verify PASSED), virtio-blk transport, backend dispatch, real MBR+GPT partition parsers, SD/eMMC command framework - GPIO: PL061 (verified), I2C: DesignWare (verified), SPI: PL022 (verified) Phase C (Advanced Features): - PCI: FULL PikeOS ARMv7 replica — transport-agnostic uos_pci_ops, config-address encoding, BAR sizing, capability walk, enumeration+bridge recursion, MSI/MSI-X - USB: PikeOS-style layered stack — usb.h contract, usb_core.cpp (enumeration state machine), usb_ehci.cpp (EHCI transport) - Display: FULL 1:1 PikeOS fbcon replica + copied font_8x16 Build foundation fixes: - Freestanding aeabi_runtime.cpp (__aeabi_uidiv/__aeabi_uldivmod) - PikeOS-style flat 4GB MMU section map + proper enable (unblocked device MMIO) - guest.h MAX_GUEST_IMAGE_SIZE 256MB->16MB (BSS was 259MB) - C/C++ linkage fixes, duplicate-virtio_net_init, MMIO access-size handling Phase D (PikeOS ARMv7 Microkernel Port): - D-1: Per-VM address spaces — cloned pgdirs, ASID-tagged TLB, 4K page walker, isolation PASSED (two guests, same VA->different PAs), guest fault recovery - D-2: IRQ dispatch backbone — 1024-slot dispatch table, real GICv2 hardware (GICD_CTLR/GICC_CTLR/GICC_PMR/GICC_IAR/GICC_EOIR), arm_irq_handler wired - D-3: Time subsystem — CNTVCT ns-since-boot, CNTP periodic ticker via D-2 - D-4: KDEV framework — linker-section driver registration, uos_kdev_init_all, name lookup - D-5: VFP/NEON — lazy enable (undef trap->CPACR+FPEXC.EN), FPEXC=0x40000000 - D-6: SMP — per-CPU state, MPIDR, IPI/SGI framework (reschedule+TLB flush) All uos_ naming (PikeOS p4_ convention adapted). Compiles -Werror freestanding C++17. Co-Authored-By: Claude <noreply@anthropic.com>
39 lines
1 KiB
C
39 lines
1 KiB
C
/*
|
|
* Universalisos VFP/NEON lazy enable (uos_fpu.h)
|
|
*
|
|
* Adapted from PikeOS cexcpt.c: p4arm_vfp_enable + _check_vundef. VFP/NEON
|
|
* starts disabled; the first VFP instruction traps as undefined. The undef
|
|
* handler calls uos_fpu_lazy_enable(), which enables CP10/CP11 access + FPEXC,
|
|
* then the faulting instruction re-executes successfully.
|
|
*
|
|
* Author: PortugalFuturista Hypervisor Development Team (adapted from SYSGO PikeOS)
|
|
*/
|
|
#ifndef UOS_FPU_H
|
|
#define UOS_FPU_H
|
|
|
|
#include <stdint.h>
|
|
#include <stdbool.h>
|
|
|
|
#ifdef __cplusplus
|
|
extern "C" {
|
|
#endif
|
|
|
|
/** Enable VFP/NEON access permanently (called once at boot or on first undef). */
|
|
void uos_fpu_enable(void);
|
|
|
|
/** Check if VFP/NEON is enabled. */
|
|
bool uos_fpu_is_enabled(void);
|
|
|
|
/** Called from the undefined-instruction handler on a VFP trap. Enables VFP
|
|
* and returns true if the instruction was a VFP instruction. */
|
|
bool uos_fpu_lazy_enable(void);
|
|
|
|
/** Init + demo. */
|
|
void uos_fpu_driver_init(void);
|
|
void uos_fpu_driver_demo(void);
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* UOS_FPU_H */
|