Fábio Coutada
bafa872415
- Rename kernel.c -> kernel.cpp and uart.c -> uart.cpp - Add universalisos::uart namespace with constexpr register definitions - Use extern "C" linkage for kernel_main() called from boot.S - Compile with arm-none-eabi-g++ using C++17 freestanding flags (-fno-exceptions, -fno-rtti, -fno-threadsafe-statics, -fno-use-cxa-atexit) - Update Makefile to use g++ and .cpp build rules
73 lines
2.1 KiB
C++
73 lines
2.1 KiB
C++
/*
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* PL011 UART driver for QEMU ARM virt machine.
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*
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* The virt machine exposes a PL011 UART at 0x09000000.
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*/
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#include "uart.h"
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namespace universalisos::uart {
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namespace {
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constexpr unsigned int UART0_BASE = 0x09000000U;
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constexpr unsigned int REG_DR = 0x00U; // Data Register
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constexpr unsigned int REG_FR = 0x18U; // Flag Register
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constexpr unsigned int REG_IBRD = 0x24U; // Integer Baud Rate Divisor
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constexpr unsigned int REG_FBRD = 0x28U; // Fractional Baud Rate Divisor
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constexpr unsigned int REG_LCR_H = 0x2CU; // Line Control Register
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constexpr unsigned int REG_CR = 0x30U; // Control Register
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constexpr unsigned int REG_IMSC = 0x38U; // Interrupt Mask Set/Clear
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constexpr unsigned int REG_ICR = 0x44U; // Interrupt Clear Register
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constexpr unsigned int FR_TXFF = 1U << 5; // Transmit FIFO full
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constexpr unsigned int CR_UARTEN = 1U << 0; // UART enable
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constexpr unsigned int CR_TXE = 1U << 8; // Transmit enable
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constexpr unsigned int CR_RXE = 1U << 9; // Receive enable
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constexpr unsigned int LCR_H_WLEN_8 = 3U << 5; // 8 data bits
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constexpr unsigned int LCR_H_FEN = 1U << 4; // Enable FIFOs
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inline volatile unsigned int ®(unsigned int offset)
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{
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return *reinterpret_cast<volatile unsigned int *>(UART0_BASE + offset);
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}
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} // namespace
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void init()
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{
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// Disable UART while configuring.
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reg(REG_CR) = 0U;
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// Clear pending interrupts.
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reg(REG_ICR) = 0x7FFU;
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// 8 data bits, no parity, one stop bit, FIFO enabled.
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reg(REG_LCR_H) = LCR_H_WLEN_8 | LCR_H_FEN;
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// Baud rate divisor for 115200 with a 24 MHz UARTCLK.
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// QEMU ignores the actual baud value, but a valid divisor is required.
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reg(REG_IBRD) = 13U;
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reg(REG_FBRD) = 1U;
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// Enable UART, TX and RX.
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reg(REG_CR) = CR_UARTEN | CR_TXE | CR_RXE;
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}
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void putc(char c)
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{
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while ((reg(REG_FR) & FR_TXFF) != 0U) {
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// Wait until the transmit FIFO is not full.
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}
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reg(REG_DR) = static_cast<unsigned int>(c);
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}
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void puts(const char *s)
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{
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while (*s != '\0') {
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putc(*s++);
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}
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}
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} // namespace universalisos::uart
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