realtek: rtl9303: enable PSE on Hasivo S1100WP-8GT-SE

Wire the two HS104 controllers on the i2c-gpio bus and attach the 8 PoE
PHYs via a new PHY_C45_PSE macro. Add the STC8 syscon with its per-port
PoE LED triggers, enable LEDS_SYSCON, and pull the PSE and STC8 kmods
into the image.

Signed-off-by: Carlo Szelinsky <github@szelinsky.de>
Link: https://github.com/openwrt/openwrt/pull/22245
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>

target/linux/realtek/dts/macros.dtsi

@@ -32,6 +32,13 @@
 		enet-phy-pair-order = <##po>; \
 	};
 
+#define PHY_C45_PSE(p, n, pi) \
+	phy##p: ethernet-phy@n { \
+		reg = <##n>; \
+		compatible = "ethernet-phy-ieee802.3-c45"; \
+		pses = <&pi>; \
+	};
+
 #define HASH_PSE_CELLS #pse-cells
 
 #define PSE_PI(p) \

target/linux/realtek/dts/rtl9303_hasivo_s1100wp-8gt-se.dts

@@ -22,6 +22,7 @@
 		led-running = &led_sys;
 		led-upgrade = &led_sys;
 		label-mac-device = &ethernet0;
+		i2c0 = &i2c_scl23_sda22;
 	};
 
 	chosen {
@@ -74,7 +75,7 @@
 		>;
 	};
 
-	i2c_scl23_sda22 {
+	i2c_scl23_sda22: i2c-scl23-sda22 {
 		compatible = "i2c-gpio";
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -84,6 +85,162 @@
 		status = "okay";
 
 		clock-frequency = <100000>;
+
+		pse0: ethernet-pse@d {
+			compatible = "hasivo,hs104";
+			reg = <0x0d>;
+			poll-interval-ms = <500>;
+			status = "okay";
+
+			pse-pis {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				pse0_pi0: pse-pi@0 {
+					reg = <0>;
+					#pse-cells = <0>;
+				};
+				pse0_pi1: pse-pi@1 {
+					reg = <1>;
+					#pse-cells = <0>;
+				};
+				pse0_pi2: pse-pi@2 {
+					reg = <2>;
+					#pse-cells = <0>;
+				};
+				pse0_pi3: pse-pi@3 {
+					reg = <3>;
+					#pse-cells = <0>;
+				};
+			};
+		};
+
+		pse1: ethernet-pse@15 {
+			compatible = "hasivo,hs104";
+			reg = <0x15>;
+			poll-interval-ms = <500>;
+			status = "okay";
+
+			pse-pis {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				pse1_pi0: pse-pi@0 {
+					reg = <0>;
+					#pse-cells = <0>;
+				};
+				pse1_pi1: pse-pi@1 {
+					reg = <1>;
+					#pse-cells = <0>;
+				};
+				pse1_pi2: pse-pi@2 {
+					reg = <2>;
+					#pse-cells = <0>;
+				};
+				pse1_pi3: pse-pi@3 {
+					reg = <3>;
+					#pse-cells = <0>;
+				};
+			};
+		};
+
+		stc8: stc8@4d {
+			compatible = "hasivo,stc8-mfd", "syscon";
+			reg = <0x4d>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+			hasivo,execute-bit = <0x40>;
+			hasivo,execute-bit-registers = <0x01 0x02>;
+			status = "okay";
+
+			led_lan1_poe: led@1,0 {
+				compatible = "register-bit-led";
+				reg = <0x01 0x00>;
+				mask = <0x08>;
+				color = <LED_COLOR_ID_ORANGE>;
+				function = "poe";
+				function-enumerator = <1>;
+				linux,default-trigger = "pse-0-000d:port0:delivering";
+				default-state = "off";
+			};
+
+			led_lan2_poe: led@1,1 {
+				compatible = "register-bit-led";
+				reg = <0x01 0x01>;
+				mask = <0x04>;
+				color = <LED_COLOR_ID_ORANGE>;
+				function = "poe";
+				function-enumerator = <2>;
+				linux,default-trigger = "pse-0-000d:port1:delivering";
+				default-state = "off";
+			};
+
+			led_lan3_poe: led@1,2 {
+				compatible = "register-bit-led";
+				reg = <0x01 0x02>;
+				mask = <0x02>;
+				color = <LED_COLOR_ID_ORANGE>;
+				function = "poe";
+				function-enumerator = <3>;
+				linux,default-trigger = "pse-0-000d:port2:delivering";
+				default-state = "off";
+			};
+
+			led_lan4_poe: led@1,3 {
+				compatible = "register-bit-led";
+				reg = <0x01 0x03>;
+				mask = <0x01>;
+				color = <LED_COLOR_ID_ORANGE>;
+				function = "poe";
+				function-enumerator = <4>;
+				linux,default-trigger = "pse-0-000d:port3:delivering";
+				default-state = "off";
+			};
+
+			led_lan5_poe: led@2,0 {
+				compatible = "register-bit-led";
+				reg = <0x02 0x00>;
+				mask = <0x08>;
+				color = <LED_COLOR_ID_ORANGE>;
+				function = "poe";
+				function-enumerator = <5>;
+				linux,default-trigger = "pse-0-0015:port0:delivering";
+				default-state = "off";
+			};
+
+			led_lan6_poe: led@2,1 {
+				compatible = "register-bit-led";
+				reg = <0x02 0x01>;
+				mask = <0x04>;
+				color = <LED_COLOR_ID_ORANGE>;
+				function = "poe";
+				function-enumerator = <6>;
+				linux,default-trigger = "pse-0-0015:port1:delivering";
+				default-state = "off";
+			};
+
+			led_lan7_poe: led@2,2 {
+				compatible = "register-bit-led";
+				reg = <0x02 0x02>;
+				mask = <0x02>;
+				color = <LED_COLOR_ID_ORANGE>;
+				function = "poe";
+				function-enumerator = <7>;
+				linux,default-trigger = "pse-0-0015:port2:delivering";
+				default-state = "off";
+			};
+
+			led_lan8_poe: led@2,3 {
+				compatible = "register-bit-led";
+				reg = <0x02 0x03>;
+				mask = <0x01>;
+				color = <LED_COLOR_ID_ORANGE>;
+				function = "poe";
+				function-enumerator = <8>;
+				linux,default-trigger = "pse-0-0015:port3:delivering";
+				default-state = "off";
+			};
+		};
 	};
 };
 
@@ -175,17 +332,17 @@
 };
 
 &mdio_bus0 {
-	PHY_C45(0, 1)
+	PHY_C45_PSE(0, 1, pse0_pi0)
-	PHY_C45(8, 2)
+	PHY_C45_PSE(8, 2, pse0_pi1)
-	PHY_C45(16, 3)
+	PHY_C45_PSE(16, 3, pse0_pi2)
-	PHY_C45(20, 4)
+	PHY_C45_PSE(20, 4, pse0_pi3)
 };
 
 &mdio_bus1 {
-	PHY_C45(24, 1)
+	PHY_C45_PSE(24, 1, pse1_pi0)
-	PHY_C45(25, 2)
+	PHY_C45_PSE(25, 2, pse1_pi1)
-	PHY_C45(26, 3)
+	PHY_C45_PSE(26, 3, pse1_pi2)
-	PHY_C45(27, 4)
+	PHY_C45_PSE(27, 4, pse1_pi3)
 };
 
 &switch0 {

target/linux/realtek/image/rtl930x.mk

@@ -66,6 +66,7 @@ define Device/hasivo_s1100wp-8gt-se
   SOC := rtl9303
   DEVICE_VENDOR := Hasivo
   DEVICE_MODEL := S1100WP-8GT-SE
+  DEVICE_PACKAGES := kmod-pse-hasivo-hs104 kmod-mfd-hasivo-stc8
   IMAGE_SIZE := 12288k
   $(Device/kernel-lzma)
 endef

target/linux/realtek/rtl930x/config-6.18

@@ -113,6 +113,7 @@ CONFIG_JFFS2_ZLIB=y
 CONFIG_KMAP_LOCAL=y
 CONFIG_LEDS_GPIO=y
 # CONFIG_LEDS_RTL8231 is not set
+CONFIG_LEDS_SYSCON=y
 CONFIG_LIBFDT=y
 CONFIG_LOCK_DEBUGGING_SUPPORT=y
 CONFIG_MACH_REALTEK_RTL=y