Merge rz_asm and rz_analysis into one library but keep deprecated apis.

The tms320c64x has been merged into tms320.

binrz/rizin/meson.build

@@ -9,13 +9,12 @@ rizin_exe = executable('rizin', 'rizin.c',
     rz_bin_dep,
     rz_flag_dep,
     rz_cons_dep,
-    rz_asm_dep,
+    rz_arch_dep,
     rz_debug_dep,
     rz_config_dep,
     rz_bp_dep,
     rz_reg_dep,
     rz_syscall_dep,
-    rz_analysis_dep,
     rz_parse_dep,
     rz_egg_dep,
     rz_search_dep,

binrz/rz-diff/meson.build

@@ -8,8 +8,7 @@ executable('rz-diff', 'rz-diff.c',
     rz_cons_dep,
     rz_core_dep,
     rz_bin_dep,
-    rz_analysis_dep,
-    rz_asm_dep,
+    rz_arch_dep,
     rz_hash_dep,
     rz_config_dep
   ],

librz/arch/analysis.c

@@ -6,12 +6,8 @@
 #include <rz_util.h>
 #include <rz_list.h>
 #include <rz_util/rz_path.h>
+#include <rz_arch.h>
 #include <rz_lib.h>
-#include <config.h>
-
-RZ_LIB_VERSION(rz_analysis);
-
-static RzAnalysisPlugin *analysis_static_plugins[] = { RZ_ANALYSIS_STATIC_PLUGINS };
 
 /**
  * \brief Returns the default size byte width of memory access operations.
@@ -76,7 +72,6 @@ static void global_kv_free(HtPPKv *kv) {
 }
 
 RZ_API RzAnalysis *rz_analysis_new(void) {
-	int i;
 	RzAnalysis *analysis = RZ_NEW0(RzAnalysis);
 	if (!analysis) {
 		return NULL;
@@ -129,8 +124,13 @@ RZ_API RzAnalysis *rz_analysis_new(void) {
 	rz_analysis_set_bits(analysis, 32);
 	analysis->plugins = rz_list_new();
 	if (analysis->plugins) {
-		for (i = 0; i < RZ_ARRAY_SIZE(analysis_static_plugins); i++) {
-			rz_analysis_plugin_add(analysis, analysis_static_plugins[i]);
+		const size_t n_plugins = rz_arch_get_n_plugins();
+		for (size_t i = 0; i < n_plugins; i++) {
+			RzAnalysisPlugin *plugin = rz_arch_get_analysis_plugin(i);
+			if (!plugin) {
+				continue;
+			}
+			rz_analysis_plugin_add(analysis, plugin);
 		}
 	}
 	analysis->ht_global_var = ht_pp_new(NULL, global_kv_free, NULL);

librz/arch/arch-asm/i4004/i4004dis.c

@@ -1,100 +0,0 @@
-// SPDX-FileCopyrightText: 2014-2018 condret <condr3t@protonmail.com>
-// SPDX-FileCopyrightText: 2014-2018 pancake <pancake@nopcode.org>
-// SPDX-License-Identifier: LGPL-3.0-only
-
-#include <rz_asm.h>
-#include <rz_types.h>
-#include <string.h>
-#include <stdio.h>
-
-/* That 3 is a hack */
-static const int i4004_ins_len[16] = {
-	1, 2, 3, 1, 2, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1
-};
-
-static const char *i4004_e[16] = {
-	"wrm",
-	"wmp",
-	"wrr",
-	"wpm",
-	"wr0",
-	"wr1",
-	"wr2",
-	"wr3",
-	"sbm",
-	"rdm",
-	"rdr",
-	"adm",
-	"rd0",
-	"rd1",
-	"rd2",
-	"rd3"
-};
-
-static const char *i4004_f[16] = {
-	"clb",
-	"clc",
-	"iac",
-	"cmc",
-	"cma",
-	"ral",
-	"rar",
-	"tcc",
-	"dac",
-	"tcs",
-	"stc",
-	"daa",
-	"kbp",
-	"dcl",
-	"invalid",
-	"invalid"
-};
-
-static int i4004_get_ins_len(ut8 hex) {
-	ut8 high = (hex & 0xf0) >> 4;
-	int ret = i4004_ins_len[high];
-	if (ret == 3)
-		ret = (hex & 1) ? 1 : 2;
-	return ret;
-}
-
-static int i4004dis(RzAsmOp *op, const ut8 *buf, int len) {
-	int rlen = i4004_get_ins_len(*buf);
-	ut8 high = (*buf & 0xf0) >> 4;
-	ut8 low = (*buf & 0xf);
-	if (rlen > len) {
-		return op->size = 0;
-	}
-	switch (high) {
-	case 0: rz_asm_op_set_asm(op, low ? "invalid" : "nop"); break;
-	case 1: rz_asm_op_setf_asm(op, "jcn %d 0x%02x", low, buf[1]); break;
-	case 2:
-		if (rlen == 1) {
-			rz_asm_op_setf_asm(op, "src r%d", (low & 0xe));
-		} else {
-			rz_asm_op_setf_asm(op, "fim r%d, 0x%02x", (low & 0xe), buf[1]);
-		}
-		break;
-	case 3:
-		if ((low & 1) == 1) {
-			rz_asm_op_setf_asm(op, "jin r%d", (low & 0xe));
-		} else {
-			rz_asm_op_setf_asm(op, "fin r%d", (low & 0xe));
-		}
-		break;
-	case 4: rz_asm_op_setf_asm(op, "jun 0x%03x", ((ut16)(low << 8) | buf[1])); break;
-	case 5: rz_asm_op_setf_asm(op, "jms 0x%03x", ((ut16)(low << 8) | buf[1])); break;
-	case 6: rz_asm_op_setf_asm(op, "inc r%d", low); break;
-	case 7: rz_asm_op_setf_asm(op, "isz r%d, 0x%02x", low, buf[1]); break;
-	case 8: rz_asm_op_setf_asm(op, "add r%d", low); break;
-	case 9: rz_asm_op_setf_asm(op, "sub r%d", low); break;
-	case 10: rz_asm_op_setf_asm(op, "ld r%d", low); break;
-	case 11: rz_asm_op_setf_asm(op, "xch r%d", low); break;
-	case 12: rz_asm_op_setf_asm(op, "bbl %d", low); break;
-	case 13: rz_asm_op_setf_asm(op, "ldm %d", low); break;
-	case 14: rz_asm_op_set_asm(op, i4004_e[low]); break;
-	case 15: rz_asm_op_set_asm(op, i4004_f[low]); break;
-	default: rz_asm_op_set_asm(op, "invalid"); break;
-	}
-	return op->size = rlen;
-}

librz/arch/arch-asm/i8080/i8080dis.c

@@ -1,147 +0,0 @@
-// SPDX-FileCopyrightText: 2012 Alexander Demin <alexander@demin.ws>
-// SPDX-License-Identifier: MIT
-
-// This file is part of Radio-86RK Tools project.
-//
-// Intel 8080 disassembler.
-//
-// https://github.com/begoon/rk86-tools
-//
-// Copyright (C) 2012 Alexander Demin <alexander@demin.ws>
-//
-// Permission is hereby granted, free of charge, to any person obtaining
-// a copy of this software and associated documentation files
-// (the "Software"), to deal in the Software without restriction,
-// including without limitation the rights to use, copy, modify, merge,
-// publish, distribute, sublicense, and/or sell copies of the Software,
-// and to permit persons to whom the Software is furnished to do so,
-// subject to the following conditions:
-// 
-// The above copyright notice and this permission notice shall be included
-// in all copies or substantial portions of the Software.
-//
-// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
-// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
-// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
-// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-#include <string.h>
-#include <stdio.h>
-#include <assert.h>
-
-static char *reg[] = { "b", "c", "d", "e", "h", "l", "m", "a" };
-static char *rp[] = { "b", "d", "h", "sp" };
-static char *push_rp[] = { "b", "d", "h", "psw" };
-static char *cond[] = { "nz", "z", "nc", "c", "po", "pe", "p", "m" };
-static char *rst[] = { "0", "1", "2", "3", "4", "5", "6", "7" };
-
-struct arg_t {
-  int type; /* 1 - next byte, 2 - next word, 3 - in opcode */
-  int shift;
-  int mask;
-  char **fmt;
-};
-
-static struct opcode_t {
-  unsigned char cmd;
-  int size;
-  char *name;
-  struct arg_t arg1, arg2;
-} opcodes[] = {
-  { 0x76, 1, "hlt" },
-  { 0x06, 2, "mvi", { 3, 3, 7, reg }, { 1 } },
-  { 0xc3, 3, "jmp", { 2 } },
-  { 0x40, 1, "mov", { 3, 3, 7, reg }, { 3, 0, 7, reg } },
-  { 0x01, 3, "lxi", { 3, 4, 3, rp }, { 2 } },
-  { 0x32, 3, "sta", { 2 } },
-  { 0x3a, 3, "lda", { 2 } },
-  { 0x2a, 3, "lhld", { 2 } },
-  { 0x22, 3, "shld", { 2 } },
-  { 0x0a, 1, "ldax", { 3, 4, 1, rp } },
-  { 0x02, 1, "stax", { 3, 4, 1, rp } },
-  { 0xeb, 1, "xchg" },
-  { 0xf9, 1, "sphl" },
-  { 0xe3, 1, "xthl" },
-  { 0xc5, 1, "push", { 3, 4, 3, push_rp } },
-  { 0xc1, 1, "pop", { 3, 4, 3, push_rp } },
-  { 0xdb, 2, "in", { 1 } },
-  { 0xd3, 2, "out", { 1 } },
-  { 0x03, 1, "inx", { 3, 4, 3, rp } },
-  { 0x0b, 1, "dcx", { 3, 4, 3, rp } },
-  { 0x04, 1, "inr", { 3, 3, 7, reg } },
-  { 0x05, 1, "dcr", { 3, 3, 7, reg } },
-  { 0x09, 1, "dad", { 3, 4, 3, rp } },
-  { 0x2f, 1, "cma" },
-  { 0x07, 1, "rlc" },
-  { 0x0f, 1, "rrc" },
-  { 0x17, 1, "ral" },
-  { 0x1f, 1, "rar" },
-  { 0xfb, 1, "ei" },
-  { 0xf3, 1, "di" },
-  { 0x00, 1, "nop" },
-  { 0x37, 1, "stc" },
-  { 0x3f, 1, "cmc" },
-  { 0xe9, 1, "pchl" },
-  { 0x27, 1, "daa" },
-  { 0xcd, 3, "call", { 2 } },
-  { 0xc9, 1, "ret" },
-  { 0xc7, 1, "rst", { 3, 3, 7, rst } },
-  { 0xc0, 1, "r", { 3, 3, 7, cond } },
-  { 0xc2, 3, "j", { 3, 3, 7, cond }, { 2 } },
-  { 0xc4, 3, "c", { 3, 3, 7, cond }, { 2 } },
-  { 0x80, 1, "add", { 3, 0, 7, reg } },
-  { 0x80|0x46, 2, "adi", { 1 } },
-  { 0x88, 1, "adc", { 3, 0, 7, reg } },
-  { 0x88|0x46, 2, "aci", { 1 } },
-  { 0x90, 1, "sub", { 3, 0, 7, reg } },
-  { 0x90|0x46, 2, "sui", { 1 } },
-  { 0x98, 1, "sbb", { 3, 0, 7, reg } },
-  { 0x98|0x46, 2, "sbi", { 1 } },
-  { 0xa0, 1, "ana", { 3, 0, 7, reg } },
-  { 0xa0|0x46, 2, "ani", { 1 } },
-  { 0xa8, 1, "xra", { 3, 0, 7, reg } },
-  { 0xa8|0x46, 2, "xri", { 1 } },
-  { 0xb0, 1, "ora", { 3, 0, 7, reg } },
-  { 0xb0|0x46, 2, "ori", { 1 } },
-  { 0xb8, 1, "cmp", { 3, 0, 7, reg } },
-  { 0xb8|0x46, 2, "cpi", { 1 } },
-  { 0x00, 1, "nop" },
-  { 0x00, 0 }
-};
-
-static void arg(char* s, int const cmd, struct arg_t const* arg, int val) {
-  if (arg->type == 3) {
-    strcat(s, arg->fmt[(cmd >> arg->shift) & arg->mask]);
-  } else {
-    if (arg->type == 1)
-      sprintf(s, "%02X", val & 0xff);
-    else if (arg->type == 2)
-      sprintf(s, "%04X", val);
-  }
-}
-
-static int i8080_disasm(unsigned char const* const code, char* text, int text_sz) {
-  int const cmd = code[0];
-  int const p = code[1] | (code[2] << 8);
-
-  struct opcode_t const *op;
-  for (op = &opcodes[0]; op->size; ++op) {
-    int const grp = cmd &
-      ~((op->arg1.mask << op->arg1.shift) | 
-       (op->arg2.mask << op->arg2.shift));
-    int const branch = (grp == 0xc0 || grp == 0xc2 || grp == 0xc4);
-    if (grp == op->cmd) {
-      strcpy(text, op->name);
-      if (!branch) strcat(text, " ");
-      arg(text + strlen(text), cmd, &op->arg1, p);
-      if (op->arg2.type != 0) strcat(text, (branch ? " " : ", "));
-      arg(text + strlen(text), cmd, &op->arg2, p);
-      return op->size;
-    }
-  }
-  snprintf(text, text_sz, "db @ 0x%02x", cmd);
-  return 1;
-}

librz/arch/arch-asm/riscv/riscv.c

@@ -1,334 +0,0 @@
-// SPDX-FileCopyrightText: 2011-2015 Free Software Foundation, Inc.
-// SPDX-License-Identifier: GPL-3.0-or-later
-
-/* RISC-V disassembler
-   Copyright 2011-2015 Free Software Foundation, Inc.
-   Contributed by Andrew Waterman (waterman@cs.berkeley.edu) at UC Berkeley.
-   Based on MIPS target.
-   This file is part of the GNU opcodes library.
-   This library is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3, or (at your option)
-   any later version.
-   It is distributed in the hope that it will be useful, but WITHOUT
-   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
-   License for more details.
-   You should have received a copy of the GNU General Public License
-   along with this program; see the file COPYING3. If not,
-   see <http://www.gnu.org/licenses/>.
-
-   - Code changes to make r2 friendly (qnix@0x80.org)
-*/
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <stdint.h>
-#include <ctype.h>
-#include <stdarg.h>
-#include <rz_asm.h>
-#include <rz_lib.h>
-#include <string.h>
-
-#include "riscv-opc.h"
-#include "riscv.h"
-
-#define ARRAY_SIZE(a) (sizeof(a) / sizeof(*a))
-
-// TODO : an conf to chose between abi or numeric
-static const char * const *riscv_gpr_names = riscv_gpr_names_abi;
-static const char * const *riscv_fpr_names = riscv_fpr_names_abi;
-static int init = 0;
-
-static void arg_p (char *buf, unsigned long val, const char* const* array, size_t size) {
-	const char *s = val >= size || array[val] ? array[val] : "unknown";
-	sprintf (buf+strlen (buf), "%s", s);
-}
-
-/* Print insn arguments for 32/64-bit code.  */
-static void get_insn_args (char *buf, const char *d, insn_t l, uint64_t pc) {
-	int rs1 = (l >> OP_SH_RS1) & OP_MASK_RS1;
-	int rd = (l >> OP_SH_RD) & OP_MASK_RD;
-	uint64_t target;
-
-	if (*d != '\0') {
-		sprintf (buf+strlen (buf), " ");
-	}
-
-	for (; *d != '\0'; d++) {
-		switch (*d) {
-			/* Xcustom */
-		case '^':
-			switch (*++d) {
-			case 'd':
-				sprintf (buf+strlen (buf), "%d", rd);
-				break;
-			case 's':
-				sprintf (buf+strlen (buf), "%d", rs1);
-				break;
-			case 't':
-				sprintf (buf+strlen (buf), "%d", (int) EXTRACT_OPERAND (RS2, l));
-				break;
-			case 'j':
-				sprintf (buf+strlen (buf), "%d", (int) EXTRACT_OPERAND (CUSTOM_IMM, l));
-				break;
-			}
-			break;
-
-		case 'C': /* RVC */
-			switch (*++d) {
-			case 's': /* RS1 x8-x15 */
-			case 'w': /* RS1 x8-x15 */
-				sprintf (buf+strlen (buf), "%s",
-				  riscv_gpr_names[EXTRACT_OPERAND (CRS1S, l) + 8]);
-				break;
-			case 't': /* RS2 x8-x15 */
-			case 'x': /* RS2 x8-x15 */
-				sprintf (buf+strlen (buf), "%s",
-				  riscv_gpr_names[EXTRACT_OPERAND (CRS2S, l) + 8]);
-				break;
-			case 'U': /* RS1, constrained to equal RD */
-				sprintf (buf+strlen (buf), "%s", riscv_gpr_names[rd]);
-				break;
-			case 'c': /* RS1, constrained to equal sp */
-				sprintf (buf+strlen (buf), "%s", riscv_gpr_names[X_SP]);
-				break;
-			case 'V': /* RS2 */
-				sprintf (buf+strlen (buf), "%s",
-				  riscv_gpr_names[EXTRACT_OPERAND (CRS2, l)]);
-				break;
-			case 'i':
-				sprintf (buf+strlen (buf), "%d", (int)EXTRACT_RVC_SIMM3 (l));
-				break;
-			case 'j':
-				sprintf (buf+strlen (buf), "%d", (int)EXTRACT_RVC_IMM (l));
-				break;
-			case 'k':
-				sprintf (buf+strlen (buf), "%d", (int)EXTRACT_RVC_LW_IMM (l));
-				break;
-			case 'l':
-				sprintf (buf+strlen (buf), "%d", (int)EXTRACT_RVC_LD_IMM (l));
-				break;
-			case 'm':
-				sprintf (buf+strlen (buf), "%d", (int)EXTRACT_RVC_LWSP_IMM (l));
-				break;
-			case 'n':
-				sprintf (buf+strlen (buf), "%d", (int)EXTRACT_RVC_LDSP_IMM (l));
-				break;
-			case 'K':
-				sprintf (buf+strlen (buf), "%d", (int)EXTRACT_RVC_ADDI4SPN_IMM (l));
-				break;
-			case 'L':
-				sprintf (buf+strlen (buf), "%d", (int)EXTRACT_RVC_ADDI16SP_IMM (l));
-				break;
-			case 'M':
-				sprintf (buf+strlen (buf), "%d", (int)EXTRACT_RVC_SWSP_IMM (l));
-				break;
-			case 'N':
-				sprintf (buf+strlen (buf), "%d", (int)EXTRACT_RVC_SDSP_IMM (l));
-				break;
-			case 'p':
-				target = EXTRACT_RVC_B_IMM (l) + pc;
-				sprintf (buf+strlen (buf), "0x%"PFMT64x, (ut64) target);
-				break;
-			case 'a':
-				target = EXTRACT_RVC_J_IMM (l) + pc;
-				sprintf (buf+strlen (buf), "0x%"PFMT64x, (ut64)target);
-				break;
-			case 'u':
-				sprintf (buf+strlen (buf), "0x%x",
-				  (int) (EXTRACT_RVC_IMM (l) & (RISCV_BIGIMM_REACH-1)));
-				break;
-			case '>':
-				sprintf (buf+strlen (buf), "0x%x", (int) EXTRACT_RVC_IMM (l) & 0x3f);
-				break;
-			case '<':
-				sprintf (buf+strlen (buf), "0x%x", (int) EXTRACT_RVC_IMM (l) & 0x1f);
-				break;
-			case 'T': /* floating-point RS2 */
-				sprintf (buf+strlen (buf), "%s",
-				  riscv_fpr_names[EXTRACT_OPERAND (CRS2, l)]);
-				break;
-			case 'D': /* floating-point RS2 x8-x15 */
-				sprintf (buf+strlen (buf), "%s",
-				  riscv_fpr_names[EXTRACT_OPERAND (CRS2S, l) + 8]);
-				break;
-			}
-			break;
-
-		case ',':
-			sprintf (buf+strlen (buf), "%c ", *d);
-			break;
-		case '(':
-		case ')':
-		case '[':
-		case ']':
-			sprintf (buf+strlen (buf), "%c", *d);
-			break;
-		case '0':
-			/* Only print constant 0 if it is the last argument */
-			if (!d[1]) {
-				sprintf (buf+strlen (buf), "0");
-			}
-			break;
-
-		case 'b':
-		case 's':
-			sprintf (buf+strlen (buf), "%s", riscv_gpr_names[rs1]);
-			break;
-
-		case 't':
-			sprintf (buf+strlen (buf), "%s",
-			  riscv_gpr_names[EXTRACT_OPERAND (RS2, l)]);
-			break;
-
-		case 'u':
-			sprintf (buf+strlen (buf), "0x%x",
-			  (unsigned) EXTRACT_UTYPE_IMM (l) >> RISCV_IMM_BITS);
-			break;
-
-		case 'm':
-			arg_p (buf, EXTRACT_OPERAND (RM, l),
-			  riscv_rm, ARRAY_SIZE (riscv_rm));
-			break;
-
-		case 'P':
-			arg_p (buf, EXTRACT_OPERAND (PRED, l),
-			  riscv_pred_succ, ARRAY_SIZE (riscv_pred_succ));
-			break;
-
-		case 'Q':
-			arg_p (buf, EXTRACT_OPERAND (SUCC, l),
-			  riscv_pred_succ, ARRAY_SIZE (riscv_pred_succ));
-			break;
-		case 'o':
-		case 'j':
-			sprintf (buf+strlen (buf), "%d", (int) EXTRACT_ITYPE_IMM (l));
-			break;
-		case 'q':
-			sprintf (buf+strlen (buf), "%d", (int) EXTRACT_STYPE_IMM (l));
-			break;
-		case 'a':
-			target = EXTRACT_UJTYPE_IMM (l) + pc;
-			sprintf (buf+strlen (buf), "0x%"PFMT64x, (ut64)target);
-			break;
-		case 'p':
-			target = EXTRACT_SBTYPE_IMM (l) + pc;
-			sprintf (buf+strlen (buf), "0x%"PFMT64x, (ut64)target);
-			break;
-		case 'd':
-			sprintf (buf+strlen (buf), "%s", riscv_gpr_names[rd]);
-			break;
-		case 'z':
-			sprintf (buf+strlen (buf), "%s", riscv_gpr_names[0]);
-			break;
-		case '>':
-			sprintf (buf+strlen (buf), "0x%x", (int) EXTRACT_OPERAND (SHAMT, l));
-			break;
-		case '<':
-			sprintf (buf+strlen (buf), "0x%x", (int) EXTRACT_OPERAND (SHAMTW, l));
-			break;
-		case 'S':
-		case 'U':
-			sprintf (buf+strlen (buf), "%s", riscv_fpr_names[rs1]);
-			break;
-		case 'T':
-			sprintf (buf+strlen (buf), "%s", riscv_fpr_names[EXTRACT_OPERAND (RS2, l)]);
-			break;
-		case 'D':
-			sprintf (buf+strlen (buf), "%s", riscv_fpr_names[rd]);
-			break;
-		case 'R':
-			sprintf (buf+strlen (buf), "%s", riscv_fpr_names[EXTRACT_OPERAND (RS3, l)]);
-			break;
-		case 'E':
-			{
-				const char* csr_name = NULL;
-				unsigned int csr = EXTRACT_OPERAND (CSR, l);
-				switch (csr)
-				 {
-#define DECLARE_CSR(name, num) case num: csr_name = #name; break;
-#include "riscv-opc.h"
-#undef DECLARE_CSR
-				 }
-				if (csr_name) {
-					sprintf (buf+strlen (buf), "%s", csr_name);
-				} else {
-					sprintf (buf+strlen (buf), "0x%x", csr);
-				}
-				break;
-			}
-		case 'Z':
-			sprintf (buf+strlen (buf), "%d", rs1);
-			break;
-		default:
-			/* xgettext:c-format */
-			sprintf (buf+strlen (buf), "# internal error, undefined modifier (%c)",
-			  *d);
-			return;
-		}
-	}
-}
-
-static struct riscv_opcode *get_opcode (insn_t word) {
-	struct riscv_opcode *op;
-	static const struct riscv_opcode *riscv_hash[OP_MASK_OP + 1] = {0};
-
-#define OP_HASH_IDX(i) ((i) & (riscv_insn_length (i) == 2 ? 3 : OP_MASK_OP))
-
-	if (!init) {
-		for (op=riscv_opcodes; op < &riscv_opcodes[NUMOPCODES]; op++) {
-			if (!riscv_hash[OP_HASH_IDX (op->match)]) {
-				riscv_hash[OP_HASH_IDX (op->match)] = op;
-			}
-		} 
-		init = 1;
-	}
-
-	return (struct riscv_opcode *)riscv_hash[OP_HASH_IDX (word)];
-}
-
-static int riscv_disassemble(RzAsm *a, RzAsmOp *rop, insn_t word, int xlen, int len) {
-	const bool no_alias = false;
-	const struct riscv_opcode *op = get_opcode (word);
-	if (!op) {
-		return -1;
-	}
-	for (; op < &riscv_opcodes[NUMOPCODES]; op++) {
-		if ( !(op->match_func)(op, word) ) {
-			continue;
-		}
-		if (no_alias && (op->pinfo & INSN_ALIAS)) {
-			continue;
-		}
-		if (isdigit ((ut8)op->subset[0]) && atoi (op->subset) != xlen ) {
-			continue;
-		}
-		if (op->name && op->args) {
-			rz_asm_op_set_asm (rop, op->name);
-			get_insn_args (rz_asm_op_get_asm (rop), op->args, word, a->pc);
-			return 0;
-		}
-		rz_asm_op_setf_asm (rop, "invalid word(%"PFMT64x")", (ut64)word);
-		return -1;
-	}
-	return 0;
-}
-
-static int riscv_dis(RzAsm *a, RzAsmOp *rop, const ut8 *buf, ut64 len) {
-	insn_t insn = {0};
-	if (len < 2) {
-		return -1;
-	}
-	// Read <= 8 bytes into 8-byte buffer in little endian fashion
-	RZ_STATIC_ASSERT(sizeof(insn) == 8);
-	ut8 tmp[8] = { 0 };
-	memcpy(&tmp, buf, RZ_MIN(sizeof(insn), len));
-	insn = rz_read_le64(tmp);
-	int insn_len = riscv_insn_length(insn);
-	if (len < insn_len) {
-		return -1;
-	}
-	riscv_disassemble (a, rop, insn, a->bits, len);
-	return insn_len;
-}

librz/arch/arch.c

@@ -0,0 +1,30 @@
+// SPDX-FileCopyrightText: 2024 RizinOrg <info@rizin.re>
+// SPDX-FileCopyrightText: 2024 deroad <wargio@libero.it>
+// SPDX-License-Identifier: LGPL-3.0-only
+
+#include <rz_lib.h>
+#include <rz_arch.h>
+
+#include "rz_arch_plugins.h"
+
+RZ_LIB_VERSION(rz_arch);
+
+static RzArchPlugin *arch_static_plugins[] = { RZ_ARCH_STATIC_PLUGINS };
+
+RZ_DEPRECATE RZ_API const size_t rz_arch_get_n_plugins() {
+	return RZ_ARRAY_SIZE(arch_static_plugins);
+}
+
+RZ_DEPRECATE RZ_API RZ_BORROW RzAsmPlugin *rz_arch_get_asm_plugin(size_t index) {
+	if (index >= RZ_ARRAY_SIZE(arch_static_plugins)) {
+		return NULL;
+	}
+	return arch_static_plugins[index]->p_asm;
+}
+
+RZ_DEPRECATE RZ_API RZ_BORROW RzAnalysisPlugin *rz_arch_get_analysis_plugin(size_t index) {
+	if (index >= RZ_ARRAY_SIZE(arch_static_plugins)) {
+		return NULL;
+	}
+	return arch_static_plugins[index]->p_analysis;
+}

librz/arch/asm.c

@@ -16,9 +16,6 @@
 #include <rz_asm.h>
 #define USE_R2 1
 #include <spp.h>
-#include <config.h>
-
-RZ_LIB_VERSION(rz_asm);
 
 /**
  * \brief Checks if the first character of \p c is a digit character
@@ -111,8 +108,6 @@ static char *directives[] = {
 	".else", ".set", ".get", NULL
 };
 
-static RzAsmPlugin *asm_static_plugins[] = { RZ_ASM_STATIC_PLUGINS };
-
 static void parseHeap(RzParse *p, RzStrBuf *s) {
 	char *op_buf_asm = rz_strbuf_get(s);
 	char *out = rz_parse_pseudocode(p, op_buf_asm);
@@ -280,7 +275,6 @@ static void plugin_fini(RzAsm *a) {
 }
 
 RZ_API RzAsm *rz_asm_new(void) {
-	int i;
 	RzAsm *a = RZ_NEW0(RzAsm);
 	if (!a) {
 		return NULL;
@@ -294,8 +288,14 @@ RZ_API RzAsm *rz_asm_new(void) {
 		free(a);
 		return NULL;
 	}
-	for (i = 0; i < RZ_ARRAY_SIZE(asm_static_plugins); i++) {
-		rz_asm_plugin_add(a, asm_static_plugins[i]);
+
+	const size_t n_plugins = rz_arch_get_n_plugins();
+	for (size_t i = 0; i < n_plugins; i++) {
+		RzAsmPlugin *plugin = rz_arch_get_asm_plugin(i);
+		if (!plugin) {
+			continue;
+		}
+		rz_asm_plugin_add(a, plugin);
 	}
 	return a;
 }

librz/arch/cpus/meson.build

@@ -1,4 +1,4 @@
-sdb_files = [
+sdb_cpus_files = [
   'avr-ATmega1280',
   'avr-ATmega1281',
   'avr-ATxmega128a4u',
@@ -13,7 +13,7 @@ sdb_files = [
   'avr-ATTiny88',
 ]
 
-foreach file : sdb_files
+foreach file : sdb_cpus_files
   outfile = '@0@.sdb'.format(file)
   custom_target(outfile,
     input: '@0@.sdb.txt'.format(file),

librz/arch/deprecated_arch_helper.h

@@ -0,0 +1,41 @@
+// SPDX-FileCopyrightText: 2024 RizinOrg <info@rizin.re>
+// SPDX-FileCopyrightText: 2024 deroad <wargio@libero.it>
+// SPDX-License-Identifier: LGPL-3.0-only
+
+#ifndef DEPRECATED_ARCH_HELPER_H
+#define DEPRECATED_ARCH_HELPER_H
+
+#include <rz_arch.h>
+
+#define DEPRECATED_OLD_ARCH_PLUGIN(name) \
+	RzArchPlugin rz_arch_plugin_##name = { \
+		.p_asm = &rz_asm_plugin_##name, \
+		.p_analysis = &rz_analysis_plugin_##name, \
+	}
+
+#define DEPRECATED_OLD_ARCH_ASM_ONLY_PLUGIN(name) \
+	RzArchPlugin rz_arch_plugin_##name = { \
+		.p_asm = &rz_asm_plugin_##name, \
+		.p_analysis = NULL, \
+	}
+
+#ifndef RZ_PLUGIN_INCORE
+#define ARCH_PLUGIN_LIB_STRUCT(name) \
+	RZ_API RzLibStruct rizin_plugin = { \
+		.type = RZ_LIB_TYPE_ARCH, \
+		.data = &rz_arch_plugin_##name, \
+		.version = RZ_VERSION \
+	}
+#else
+#define ARCH_PLUGIN_LIB_STRUCT(name)
+#endif
+
+#define RZ_ARCH_PLUGIN_DEFINE_DEPRECATED(name) \
+	DEPRECATED_OLD_ARCH_PLUGIN(name); \
+	ARCH_PLUGIN_LIB_STRUCT(name)
+
+#define RZ_ARCH_ASM_ONLY_PLUGIN_DEFINE_DEPRECATED(name) \
+	DEPRECATED_OLD_ARCH_ASM_ONLY_PLUGIN(name); \
+	ARCH_PLUGIN_LIB_STRUCT(name)
+
+#endif /* DEPRECATED_ARCH_HELPER_H */

librz/arch/dwarf_process.c

@@ -457,15 +457,15 @@ static const char *map_dwarf_reg_to_riscv_reg(ut32 reg_num) {
 #define KASE(_num, _reg) \
 	case _num: return #_reg;
 
-#include "librz/analysis/arch/arm/arm_dwarf_regnum_table.h"
-#include "hexagon_dwarf_reg_num_table.inc"
-#include "librz/analysis/arch/ppc/ppc_dwarf_regnum_table.h"
-#include "librz/analysis/arch/v850/v850_dwarf_reg_num_table.h"
-#include "librz/analysis/arch/rl78/rl78_dwarf_reg.h"
-#include "librz/analysis/arch/rx/rx_dwarf_regnum_table.h"
-#include "librz/analysis/arch/sh/sh_dwarf_regnum_table.h"
-#include "librz/analysis/arch/tricore/tricore_dwarf_regnum_table.h"
-#include "librz/analysis/arch/x86/x86_dwarf_regnum_table.h"
+#include <arm/arm_dwarf_regnum_table.h>
+#include <hexagon/hexagon_dwarf_reg_num_table.inc>
+#include <ppc/ppc_dwarf_regnum_table.h>
+#include <v850/v850_dwarf_reg_num_table.h>
+#include <rl78/rl78_dwarf_reg.h>
+#include <rx/rx_dwarf_regnum_table.h>
+#include <sh/sh_dwarf_regnum_table.h>
+#include <tricore/tricore_dwarf_regnum_table.h>
+#include <x86/x86_dwarf_regnum_table.h>
 
 /**
  * \brief Returns a function that maps a DWARF register number to a register name

librz/arch/isa/6502/6502dis.c

@@ -7,7 +7,7 @@
 #include <rz_asm.h>
 #include <rz_lib.h>
 #include <string.h>
-#include "../snes/snesdis.c"
+#include <snes/snes.h>
 
 static struct {
 	ut8 op;
@@ -139,7 +139,7 @@ static struct {
 	{ -1, NULL, 0 }
 };
 
-static int _6502Disass(ut64 pc, RzAsmOp *op, const ut8 *buf, ut64 len) {
+int disass_6502(ut64 pc, RzAsmOp *op, const ut8 *buf, ut64 len) {
 	int i;
 	for (i = 0; ops[i].name != NULL; i++) {
 		if (ops[i].op == buf[0]) {

librz/arch/isa/6502/6502dis.h

@@ -0,0 +1,11 @@
+// SPDX-FileCopyrightText: 2024 deroad <wargio@libero.it>
+// SPDX-License-Identifier: LGPL-3.0-only
+
+#ifndef DISASSEMBLE_6502_H
+#define DISASSEMBLE_6502_H
+
+#include <rz_asm.h>
+
+int disass_6502(ut64 pc, RzAsmOp *op, const ut8 *buf, ut64 len);
+
+#endif /* DISASSEMBLE_6502_H */

librz/arch/isa/8051/8051_ass.h

@@ -1,10 +1,11 @@
 // SPDX-FileCopyrightText: 2019 hmht
 // SPDX-License-Identifier: LGPL-3.0-only
 
-#ifndef _8051_ASS_H
-#define _8051_ASS_H
+#ifndef ASSEMBLE_8051_H
+#define ASSEMBLE_8051_H
 
 #include <rz_asm.h>
+
 int assemble_8051(RzAsm *a, RzAsmOp *op, char const *user_asm);
 
-#endif
+#endif /* ASSEMBLE_8051_H */

librz/arch/isa/8051/8051_disas.c

@@ -5,10 +5,10 @@
 // SPDX-FileCopyrightText: 2015-2019 astuder <github@adrianstuder.com>
 // SPDX-License-Identifier: LGPL-3.0-only
 
-#include <rz_asm.h>
 #include <rz_lib.h>
 #include <string.h>
 
+#include "8051_disas.h"
 #include "8051_ops.h"
 
 static const char *_8051_regs[] = {
@@ -66,7 +66,7 @@ static char *_replace_register(char *disasm, ut8 arg, ut8 val) {
 	return disasm;
 }
 
-static char *rz_8051_disas(ut64 pc, const ut8 *buf, int len, int *olen) {
+char *rz_8051_disas(ut64 pc, const ut8 *buf, int len, int *olen) {
 	int i = 0;
 	while (_8051_ops[i].string && _8051_ops[i].op != (buf[0] & ~_8051_ops[i].mask)) {
 		i++;

librz/arch/isa/8051/8051_disas.h

@@ -0,0 +1,11 @@
+// SPDX-FileCopyrightText: 2024 deroad <wargio@libero.it>
+// SPDX-License-Identifier: LGPL-3.0-only
+
+#ifndef DISASSEMBLE_8051_H
+#define DISASSEMBLE_8051_H
+
+#include <rz_asm.h>
+
+char *rz_8051_disas(ut64 pc, const ut8 *buf, int len, int *olen);
+
+#endif /* DISASSEMBLE_8051_H */

librz/arch/isa/arm/arm_cs.h

@@ -6,7 +6,7 @@
 
 #include <rz_analysis.h>
 #include <capstone/capstone.h>
-#include "../../asm/arch/arm/aarch64_meta_macros.h"
+#include "aarch64_meta_macros.h"
 
 RZ_IPI int rz_arm_cs_analysis_op_32_esil(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf, int len, csh *handle, cs_insn *insn, bool thumb);
 RZ_IPI int rz_arm_cs_analysis_op_64_esil(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf, int len, csh *handle, cs_insn *insn);

librz/arch/isa/arm/arm_it.h

@@ -3,6 +3,7 @@
 // SPDX-License-Identifier: LGPL-3.0-only
 
 #ifndef RZ_ARM_IT_H
+#define RZ_ARM_IT_H
 
 /**
  * \file
@@ -25,4 +26,4 @@ RZ_API void rz_arm_it_update_block(RzArmITContext *ctx, cs_insn *insn);
 RZ_API void rz_arm_it_update_nonblock(RzArmITContext *ctx, cs_insn *insn);
 RZ_API bool rz_arm_it_apply_cond(RzArmITContext *ctx, cs_insn *insn);
 
-#endif
+#endif /* RZ_ARM_IT_H */

librz/arch/isa/arm/asm-arm.h

@@ -5,7 +5,7 @@
 #define _INCLUDE_ARMASS_H_
 
 #include <rz_types_base.h>
-#include "../arch/arm/aarch64_meta_macros.h"
+#include "aarch64_meta_macros.h"
 
 int armass_assemble(const char *str, ut64 off, int thumb);
 

librz/arch/isa/avr/avr_il.h

@@ -6,7 +6,7 @@
 #define RZIL_ANALYSIS_AVR_H
 
 #include <rz_analysis.h>
-#include "../../../asm/arch/avr/disassembler.h"
+#include "disassembler.h"
 
 RZ_IPI bool rz_avr_il_opcode(RzAnalysis *analysis, RzAnalysisOp *op, ut64 pc, AVROp *aop, AVROp *next_op);
 RZ_IPI RzAnalysisILConfig *rz_avr_il_config(RZ_NONNULL RzAnalysis *analysis);

librz/arch/isa/dcpu16/dis.c

@@ -7,6 +7,7 @@
 
 #include <stdio.h>
 #include <stdlib.h>
+#include <string.h>
 #include "dcpu16.h"
 
 struct op_code {

librz/arch/isa/gb/gb.h

@@ -4,6 +4,7 @@
 #ifndef GB_H
 #define GB_H
 #include <rz_types.h>
+#include <rz_asm.h>
 
 typedef struct gb_user_t {
 	ut8 mbc_id;
@@ -66,4 +67,7 @@ enum {
 	RAM8K,
 	RAM32K
 };
+
+int gbDisass(RzAsmOp *op, const ut8 *buf, int len);
+int gbAsm(RzAsm *a, RzAsmOp *op, const char *buf);
 #endif

librz/arch/isa/gb/gbasm.c

@@ -203,7 +203,7 @@ static bool gb_parse_ld3(ut8 *buf, char *buf_asm) {
 	return true;
 }
 
-static int gbAsm(RzAsm *a, RzAsmOp *op, const char *buf) {
+int gbAsm(RzAsm *a, RzAsmOp *op, const char *buf) {
 	int mn_len, j, len = 1;
 	ut32 mn = 0;
 	ut64 num;

librz/arch/isa/gb/gbdis.c

@@ -150,8 +150,7 @@ static void gb_hardware_register_name(char *reg, ut8 offset) {
 	}
 }
 
-#ifndef GB_DIS_LEN_ONLY
-static int gbDisass(RzAsmOp *op, const ut8 *buf, int len) {
+int gbDisass(RzAsmOp *op, const ut8 *buf, int len) {
 	int foo = gbOpLength(gb_op[buf[0]].type);
 	if (len < foo) {
 		return 0;
@@ -181,4 +180,3 @@ static int gbDisass(RzAsmOp *op, const ut8 *buf, int len) {
 	}
 	return foo;
 }
-#endif