If a function calls 'rz_cons_break_push()' but never calls 'rz_cons_break_pop()' before return,
the stack count of 'RzConsContext->break_stack' contains too many elements (each time one too much).
This in turn will lead to not resetting 'RzConsContext->breaked' flag.
Because the flag is only set to false, if 'rz_stack_is_empty(context->break_stack) == true'
(in 'rz_cons_context_break_push()').
This wasn't a problem so far, because 'RzConsContext->breaked' is simply never set to true
(exceptions are some timeout cases as far as I can see).
Also these cases when 'rz_cons_break_pop()' was forgetten to be called, were edge error cases.
So not often hit.
But if Rizin is usd by Cutter 'RzConsContext->breaked' is set to 'true',
if an `AnalysisTask` interrupt is handled (in 'AnalysisTask::interrupt()').
This interrupt is triggered for example, when the introduction dialog is closed
and the main Cutter window opens (after the optional 'aaa').
Now, if the binary file was analysed with 'aaa', and a lot of error cases were hit,
those error cases sometimes never called 'rz_cons_break_pop()' before returning from their function.
Although, of course, they should have to the `RzConsContext->break_stack` is in a proper state.
This means, when the main Cutter window opens binary files which trigger many error edge cases,
the `RzConsContext->break_stack` is not empty
(because of the not executed 'rz_cons_break_pop()').
This also means, that the last thing done, was setting 'RzConsContext->breaked = true'
(by 'AnalysisTask::interrupt()').
If Cutter wants to show some disassembly, it calls 'rz_core_print_disasm()' which checks
'RzConsContext == false' via 'rz_cons_is_breaked()'. This condition is never true, because
the flag was not reset to `false` because the stack was never empty.
So it returns before anything was disassembled.
Hence Cutter gets no disassembly text.
Fixes https://github.com/rizinorg/cutter/issues/2552
Fixes https://github.com/rizinorg/cutter/issues/3275
* Create `il_fp_ops.inc`, for floating-point instructions' IL ops
* Add IL implementation for `FABS`
* Also add `x86_il_{get,set}_st_reg` helper functions
* Add IL implementation for `FNINIT` and `FLDCW`
* Add IL implementations for `FNSTCW` and `FNSTSW`
* Add IL implementation for `FNCLEX`
* Add ST push and pop functions
* Fix clang formatting
* Add fucntions for updating FPSW TOP pointer
* Add `FLD` instruction lifitng, FPSW flag support, FP operand support
* Remove `x86_bool_to_bv` and use the standard `BOOL_TO_BV`
* Add implementation for `FST{P}`, and rounding mode support
* Add `FLD` variants for constants
* Fix formatting and build
* Add IL lifting for `FXCH`
* Add width checks to avoid redundant rounding
* Implement IL lifting for `FILD`, `FIST{P}`
* Add helper functions to inter-convert floating point values and
integers using the rounding mode in the control word
* FPU stack regs are 80-bit, not 64-bit
* Add RzIL lifting for `FBLD`
* Add RzIL implementation for `FBSTP`
* An invalid-arithmetic-operand (#IA) exception may occurr if the
value being converted to the BCD integer cannot fit in an 18-bit
BCD integer. For the IL's purpose, we just jump to the "int" label
(stands for interrupt) using `GOTO`.
* Remove all the `EMPTY()` ops after `GOTO()` ops
* On second thought, using `EMPTY()` ops after `GOTO()` ops is not
the best idea to indicate end of analysis. Maybe the hooks can
signal that analysis needs to be restarted.
* Also, clean up the comments of a bunch of unimplemented ops
* Moved some code around
* Rename "rmode" local variable to "_rmode"
* Add some TODOs for deffered work
* Fix failing asm tests
* Caused due to the removal of the [empty] opcode
* Implement IL lifting for `FADD` (and some other minor refactoring)
* Implement the IL lifting for `FADD`: This is not entirely correct
as of now, because we don't handle setting C1 based on rounding
up/down, but I think it should be fine for now. Need to tackle
setting the control word bits later
* Start using `RzFloatFormat` to describe the float's width instead
of using an unsigned integer. Provide and expose conversion
functions between the two
* Use a global to denote when RMode needs to be init, implement FIADD
* Other minor refactor which fixes the CI (hopefully)
* Implement `FMUL` and `FIMUL`
* Extract the common code into a C macro
* Implement RzIL for `FSUB` and `FISUB`
* Also add `x86_il_fsub_with_rmode` helper
* Implement RzIL for `FSUBR` and `FISUBR`
* Reuse the implementation of `x86_il_fsub_with_rmode` and just pass
the arguments in the opposite order
* Add RzIL implementation for `FDIV`, `FIDIV`, `FDIVR`, `FIDIVR`
* Add pop versions of floating point arithmetic instuctions
* Add a new macro `X86_ARITHMETIC_POP_IL` macro for the same
* Fix a typo
* Add a note for using `X86_INS_PFADD` for FADDP instruction on
Capstone version newer than 4
* Add RzIL implementations for `FCOM`, `FCOMP` and `FCOMPP`
* Add RzIL lifting for `FUCOM` and `FCOMI` families of instructions
* Implement RzIL lifting for `FCHS` and `FTST`
* Add RzIL implementation for `FRNDINT` and `FSQRT`
* Add RzIL implementation for `FNOP` and `FISTTP`
* Remove global variable `use_rmode` and use pass around a context instead
* Define a new `X86ILContext` struct to pass around information
whether we need to intitialize the rouding mode or not
* Remove the global variable which was previously responsible for
doing so
* Add RzIL for `FICOM` and `FICOMP`, add register bindings and fix bugs
* Make `rz-test` more robust against IL outputs with newlines in them
* Add RzIL tests in db/asm for x86 FPU instructions
* Fix the bug when using `FADDP` with Capstone version > 4
* Fix remaining db tests
* Remove tests for `FSTSW` or `FSTCW` instructions
* We already test `WAIT` (in `db/asm/x86_32`) and `FSTSW` (or
`FSTCW`) (in `db/asm/x86_64`)
* Remove the newline replacement code in `rz-test` as well, since we
wouldn't need that functionality anymore
* Add asm tests for math constant push instructions
* Add `RZ_IPI` annotation for all the functions exposed through the header
* Add `RZ_OWN`, `RZ_BORROW` and `RZ_NONNULL` annotations
* Add Doxygen doc for `ctx` argument
* Add description for the `EXEC_WITH_RMODE` macro
* Move the non-null check for `ctx` inside the valid branch
* When we pop the FPU stack we pass in a `NULL` context since no
resizing would be needed, which causes a failure if the non-null
check for the `ctx` is outside the branch
* Fixes failing tests in `db/asm`
* Minor bug fixes + make the annotations less strict than they need to be
* Minor bug fixes
* Incorrect implementation for `RET` and `CALL`
* Swapped arguments for shift right
* Fix asm tests for `JMP` and `RET` instructions
* Fix indexing error for `FXCH`
* Review changes
* Move all unimplemented instructions to the end
* Remove support for Capstone version less than 4
* Basic framework of rx implemented
* Add match and parse flow
* Add part of description for RxV1 instruction set
* Add datasheet for rxv1
* Implement stringify op for rx
* Add missing TST instruction in datasheet
* Test to div instruction and fix bugs
* Test known rxv1 instruction set
* Fix bugs in rx disasm plugin and add SPDX
* Add rz_analysis for renesas rx
* Fix rz_analysis bug for renesas rx
* Add rz_asm test and fix bug in datasheet
* Add analysis test and fix bugs for renesas rx
* Add different types of GraphNodeInfos.
This adds support for multiple graph node infos.
It removes the assumption that information of
a graph node must be some strings and an offset.
* Increase buffer for printing graph node body
* Don't hardcode maximum label size
* Add graph node info for icfg
* Add node type info to CFG.
* Access address members properly for iCFG and CFG nodes
* Update test. Function names are no longer saved.
* Fix reachable double free of label
* Split graph node type from its sub-type to make it less confusing.
* Add integration tests for iCFG nodes.
* Fix, add mising buffer read
* Recognize more calls
* Add test for iCFG generation and its node details.
* Add CFG generation function.
* Document rz_analysis_op()
* Set type annotation to NONNULL
* Add command to generate CFG.
* Add note about not following calls.
* Add tests and simplify check.
