rizin/test/db/asm
Rot127 10bedc2b00
Add Hexagon register profile (#2490)
Although the reg profile was not really used yet it will be relevant for the RZIL uplifting.
Introduces:
* Double/quadruple registers now properly overlap with their counterparts.
* Registers have correct types assigned (vec, ctr, sys etc. Before, all regs were of type gbr)
* Consistent register names (asm name style: c3:2, r31 etc, alias style: lc1:sa1, lr etc.)
* Adds _tmp registers in the profile. Later used by uplifted instructions (think of .new registers).
2022-04-03 18:26:17 +02:00
..
6502 [RzIL] Coalesce nested seq when printing (#2262) 2022-01-28 16:58:51 +01:00
8051
amd29k_29000_32
arc_16
arc_32
arm_16 [RzIL] Add lifter for 32-bit Arm, including thumb (#2241) 2022-02-22 12:23:28 +00:00
arm_32 [RzIL] Add lifter for 32-bit Arm, including thumb (#2241) 2022-02-22 12:23:28 +00:00
arm_64 [RzIL] Add lifter for Armv8 AArch64 (#2354) 2022-03-27 10:29:51 +02:00
arm_cortex_16
avr [RzIL] Fix sbc/sbci and leaks in AVR lifter (#2389) 2022-03-07 15:50:11 +00:00
bf [RzIL] Make bf emulation stateless (#2214) 2022-01-16 14:33:05 +01:00
chip8
cr16
dalvik
ebc
gb
h8300
hexagon Add Hexagon register profile (#2490) 2022-04-03 18:26:17 +02:00
i4004
java Java assembler (#903) 2021-03-25 17:52:36 +08:00
lh5801
luac_5.3_16 Lua 5.3 support RzAsm + RzAnalysis 2021-04-14 16:22:15 +08:00
luac_5.4_16 Lua 5.3 support RzAsm + RzAnalysis 2021-04-14 16:22:15 +08:00
mips.gnu_64
mips_64
mips_v2_64
msp430
or1k
pic_pic18_8
riscv_32
sh
snes_16 Add asm tests for all legal 6502 ops 2022-01-14 00:47:33 +08:00
spc700
tms320_c55x+_32
tms320_c55x_32
v810
wasm
x86_16 Add IL lifting testing to rz-test 2022-01-10 19:27:09 +01:00
x86_32
x86_64
z80