* Added build files [Capstone to Zydis] * x86 Analysis [Capstone to Zydis] * Changed x86 RzIL [Capstone to Zydis] * Changed asm and arch files [Capstone to Zydis] * Compilation, build error and test fixes [Capstone to Zydis] * Test changes [Capstone to Zydis] * Remaining changes [Capstone to Zydis] * Added BE support [Capstone to Zydis] --------- Co-authored-by: tushar3q34 <tushar3q34@gmail.com>
26 lines
643 B
Text
26 lines
643 B
Text
NAME=agf j resolv reloc symbols
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FILE=bins/elf/ls
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CMDS=<<EOF
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aa 2> /dev/null
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aac 2> /dev/null
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sf loc.0000f190
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agf j ~reloc.free
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EOF
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EXPECT=
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RUN
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NAME=agf J
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FILE==
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CMDS=<<EOF
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e asm.arch=x86
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e asm.bytes=true
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e asm.bits=64
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s 0x42
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wx 00004883f80074060000000000000000c3
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af
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agf J
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EOF
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EXPECT=<<EOF
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{"nodes":[{"id":0,"title":"0x42","body":"fcn.00000042();\nadd byte [rax], al\ncmp rax, 0x00\njz 0x50\n","offset":66,"out_nodes":[1,2]},{"id":1,"title":"0x50","body":"add byte [rax], al\nret\n","offset":80,"out_nodes":[]},{"id":2,"title":"0x4a","body":"add byte [rax], al\nadd byte [rax], al\nadd byte [rax], al\n","offset":74,"out_nodes":[1]}]}
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EOF
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RUN
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