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riscv: reorder setMR to align to enum

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Aligning the order of setMR writes to the enum order avoids having
to prove that the operations commute.

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
This commit is contained in:
Gerwin Klein 2020-04-24 14:50:58 +08:00
parent c0fae570a9
commit 9100cadb51
1 changed files with 2 additions and 2 deletions
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4
src/arch/riscv/api/faults.c
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@ -33,10 +33,10 @@ word_t Arch_setMRs_fault(tcb_t *sender, tcb_t *receiver, word_t *receiveIPCBuffe
switch (faultType) {
case seL4_Fault_VMFault: {
setMR(receiver, receiveIPCBuffer, seL4_VMFault_IP, getRestartPC(sender));
setMR(receiver, receiveIPCBuffer, seL4_VMFault_PrefetchFault,
seL4_Fault_VMFault_get_instructionFault(sender->tcbFault));
setMR(receiver, receiveIPCBuffer, seL4_VMFault_Addr,
seL4_Fault_VMFault_get_address(sender->tcbFault));
setMR(receiver, receiveIPCBuffer, seL4_VMFault_PrefetchFault,
seL4_Fault_VMFault_get_instructionFault(sender->tcbFault));
return setMR(receiver, receiveIPCBuffer, seL4_VMFault_FSR,
seL4_Fault_VMFault_get_FSR(sender->tcbFault));
}