riscv: Add FPU functions for RISCV
These functions are called by the arch-independent functions to save and restore FPU state lazily. Signed-off-by: Yanyan Shen <yanyan.shen@data61.csiro.au>
This commit is contained in:
Yanyan Shen
Siwei Zhuang
parent
4006310e68
commit
ff7562b288
2 changed files with 179 additions and 0 deletions
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@ -6,3 +6,177 @@
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#pragma once
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#include <util.h>
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#include <arch/machine/registerset.h>
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#ifdef CONFIG_HAVE_FPU
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typedef struct fpu_status {
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bool_t enabled;
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PAD_TO_NEXT_CACHE_LN(sizeof(bool_t));
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} fpu_status_t;
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extern fpu_status_t fpu_status[CONFIG_MAX_NUM_NODES];
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#if defined(CONFIG_RISCV_EXT_D)
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#define FL "fld"
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#define FS "fsd"
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#define FP_REG_BYTES "8"
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#elif defined(CONFIG_RISCV_EXT_F)
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#define FL "flw"
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#define FS "fsw"
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#define FP_REG_TYPES "4"
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#endif
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static inline void set_fs_off(void)
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{
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asm volatile("csrc sstatus, %0" :: "rK"(SSTATUS_FS));
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}
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static inline void set_fs_clean(void)
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{
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asm volatile("csrs sstatus, %0" :: "rK"(SSTATUS_FS_CLEAN));
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}
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static inline void set_fs_initial(void)
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{
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asm volatile("csrs sstatus, %0" :: "rK"(SSTATUS_FS_INITIAL));
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}
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static inline void set_fs_dirty(void)
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{
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asm volatile("csrs sstatus, %0" :: "rK"(SSTATUS_FS_DIRTY));
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}
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static inline word_t read_sstatus_fs(void)
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{
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return (read_sstatus() & SSTATUS_FS);
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}
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/* We unconditionally enable FPU accesses in kernel
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* mode for save and store functions. The field
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* we be set again before returning to user-mode
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* to actually enable/disable FPU accesses in
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* user mode.
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*/
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static inline void saveFpuState(user_fpu_state_t *dest)
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{
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set_fs_clean();
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asm volatile(
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FS " f0, 0*" FP_REG_BYTES "(%0)\n\t"
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FS " f1, 1*" FP_REG_BYTES "(%0)\n\t"
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FS " f2, 2*" FP_REG_BYTES "(%0)\n\t"
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FS " f3, 3*" FP_REG_BYTES "(%0)\n\t"
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FS " f4, 4*" FP_REG_BYTES "(%0)\n\t"
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FS " f5, 5*" FP_REG_BYTES "(%0)\n\t"
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FS " f6, 6*" FP_REG_BYTES "(%0)\n\t"
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FS " f7, 7*" FP_REG_BYTES "(%0)\n\t"
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FS " f8, 8*" FP_REG_BYTES "(%0)\n\t"
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FS " f9, 9*" FP_REG_BYTES "(%0)\n\t"
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FS " f10, 10*" FP_REG_BYTES "(%0)\n\t"
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FS " f11, 11*" FP_REG_BYTES "(%0)\n\t"
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FS " f12, 12*" FP_REG_BYTES "(%0)\n\t"
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FS " f13, 13*" FP_REG_BYTES "(%0)\n\t"
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FS " f14, 14*" FP_REG_BYTES "(%0)\n\t"
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FS " f15, 15*" FP_REG_BYTES "(%0)\n\t"
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FS " f16, 16*" FP_REG_BYTES "(%0)\n\t"
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FS " f17, 17*" FP_REG_BYTES "(%0)\n\t"
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FS " f18, 18*" FP_REG_BYTES "(%0)\n\t"
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FS " f19, 19*" FP_REG_BYTES "(%0)\n\t"
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FS " f20, 20*" FP_REG_BYTES "(%0)\n\t"
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FS " f21, 21*" FP_REG_BYTES "(%0)\n\t"
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FS " f22, 22*" FP_REG_BYTES "(%0)\n\t"
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FS " f23, 23*" FP_REG_BYTES "(%0)\n\t"
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FS " f24, 24*" FP_REG_BYTES "(%0)\n\t"
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FS " f25, 25*" FP_REG_BYTES "(%0)\n\t"
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FS " f26, 26*" FP_REG_BYTES "(%0)\n\t"
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FS " f27, 27*" FP_REG_BYTES "(%0)\n\t"
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FS " f28, 28*" FP_REG_BYTES "(%0)\n\t"
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FS " f29, 29*" FP_REG_BYTES "(%0)\n\t"
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FS " f30, 30*" FP_REG_BYTES "(%0)\n\t"
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FS " f31, 31*" FP_REG_BYTES "(%0)\n\t"
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:
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: "r"(&dest->regs[0])
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: "memory"
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);
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dest->fcsr = read_fcsr();
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}
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static inline void loadFpuState(user_fpu_state_t *src)
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{
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set_fs_clean();
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asm volatile(
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FL " f0, 0*" FP_REG_BYTES "(%0)\n\t"
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FL " f1, 1*" FP_REG_BYTES "(%0)\n\t"
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FL " f2, 2*" FP_REG_BYTES "(%0)\n\t"
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FL " f3, 3*" FP_REG_BYTES "(%0)\n\t"
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FL " f4, 4*" FP_REG_BYTES "(%0)\n\t"
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FL " f5, 5*" FP_REG_BYTES "(%0)\n\t"
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FL " f6, 6*" FP_REG_BYTES "(%0)\n\t"
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FL " f7, 7*" FP_REG_BYTES "(%0)\n\t"
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FL " f8, 8*" FP_REG_BYTES "(%0)\n\t"
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FL " f9, 9*" FP_REG_BYTES "(%0)\n\t"
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FL " f10, 10*" FP_REG_BYTES "(%0)\n\t"
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FL " f11, 11*" FP_REG_BYTES "(%0)\n\t"
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FL " f12, 12*" FP_REG_BYTES "(%0)\n\t"
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FL " f13, 13*" FP_REG_BYTES "(%0)\n\t"
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FL " f14, 14*" FP_REG_BYTES "(%0)\n\t"
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FL " f15, 15*" FP_REG_BYTES "(%0)\n\t"
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FL " f16, 16*" FP_REG_BYTES "(%0)\n\t"
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FL " f17, 17*" FP_REG_BYTES "(%0)\n\t"
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FL " f18, 18*" FP_REG_BYTES "(%0)\n\t"
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FL " f19, 19*" FP_REG_BYTES "(%0)\n\t"
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FL " f20, 20*" FP_REG_BYTES "(%0)\n\t"
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FL " f21, 21*" FP_REG_BYTES "(%0)\n\t"
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FL " f22, 22*" FP_REG_BYTES "(%0)\n\t"
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FL " f23, 23*" FP_REG_BYTES "(%0)\n\t"
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FL " f24, 24*" FP_REG_BYTES "(%0)\n\t"
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FL " f25, 25*" FP_REG_BYTES "(%0)\n\t"
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FL " f26, 26*" FP_REG_BYTES "(%0)\n\t"
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FL " f27, 27*" FP_REG_BYTES "(%0)\n\t"
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FL " f28, 28*" FP_REG_BYTES "(%0)\n\t"
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FL " f29, 29*" FP_REG_BYTES "(%0)\n\t"
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FL " f30, 30*" FP_REG_BYTES "(%0)\n\t"
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FL " f31, 31*" FP_REG_BYTES "(%0)\n\t"
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:
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: "r"(&src->regs[0])
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);
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write_fcsr(src->fcsr);
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}
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static inline void enableFpu(void)
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{
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fpu_status[SMP_TERNARY(getCurrentCPUIndex(), 0)].enabled = true;
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}
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static inline bool_t isFpuEnabled(void)
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{
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return fpu_status[SMP_TERNARY(getCurrentCPUIndex(), 0)].enabled;
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}
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static inline void disableFpu(void)
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{
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fpu_status[SMP_TERNARY(getCurrentCPUIndex(), 0)].enabled = false;
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}
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static inline void set_tcb_fs_state(tcb_t *tcb, bool_t enabled)
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{
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word_t sstatus = getRegister(tcb, SSTATUS);
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sstatus &= ~SSTATUS_FS;
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if (enabled) {
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sstatus |= SSTATUS_FS_CLEAN;
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}
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setRegister(tcb, SSTATUS, sstatus);
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}
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#endif
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#endif /* __ARCH_MACHINE_FPU_H */
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5
src/arch/riscv/machine/fpu.c
Normal file
5
src/arch/riscv/machine/fpu.c
Normal file
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@ -0,0 +1,5 @@
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#include <arch/machine/fpu.h>
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#ifdef CONFIG_HAVE_FPU
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fpu_status_t fpu_status[CONFIG_MAX_NUM_NODES];
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#endif
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