* Change restore_user_context() and fastpath_restore() to call POPF
just before SYSEXIT.
* Also change the way registers are loaded such that we don't access
memory that is not guarded by the current position of the stack pointer.
The reason for this change is that EFLAGS.TF, the Trap Flag, only takes
effect on the instruction AFTER the instruction that sets EFLAGS.TF. The
reason Intel/AMD did it this way is to allow the kernel to enable EFLAGS.TF
for userspace, without it taking effect on kernel instructions BEFORE
the CPU actually has returned to userspace.
EFLAGS.TF enables single-stepping. So the full picture is that since we
executed other instructions between POPF and SYSRET, those instructions
were triggering single-stepping IN the kernel. To solve this, we must
put POPF immediately before SYSRET.
Given that the log buffer is now
(79291252a8) in user-level, the kernel doesn't have
to dump and send the size for users. Users have to take care of this.
Adds the following constants to libsel4
and uses them in the kernel.
seL4_SectionSize (arm)
seL4_SuperSectionSize (arm)
seL4_HugePageSize (x86 - pae)
seL4_LargePageSize (arm)
seL4_DataFault
seL4_InstructionFault
* commit '16c3481109e2024d6fd65365ea94265ead37dcca':
SELFOUR-518: User-level log buffer
Benchmark: share and use KS_LOG_PPTR and PPTR_TOP for x86 and ARM
CPSR_IDLETHREAD was introduced in a5f61c7 to mask FIQs and asynchronous
aborts. Usage of this was lost in a merge, this commit restores the
usages in Arch_configureIdleThread, and updates CPSR_IDLETHREAD to
use the correct PMODE depending on whether the kernel is running
in hypervisor mode or not
If an irq over max IRQ came in (unlikely) then it would result in an
array bounds over flow. gcc detected this as a result of the inlining of
the irq functions.
* rename physBaseMapping to BASE_OFFSET
* because physBaseMapping was only used explicity in a few places
* move duplicated arm definions up a level
- PPTR_TOP
- PADDR_TOP
- BASE_OFFSET
Inline non-boot irq functions called on the irq path.
This improves performance of interrupt paths through code locality.
Additionally, remove unused functions and use the BIT macro
rather than redefining it.
When hypervisor extensions are not enabled the boot code cannot
actually call vcpu_boot_init as the symbol names do not even
exist. This is fixed be defining macros that expand to nothing
This commit wraps accesses to the vgic in functions that are marked as
DONT_TRANSLATE and uses a global constant (that is determined at boot time)
for the number of LR registers to prevent loops that have undefined bounds
* commit '3ffa58aa1fb75c65fac4d1351bc6e014bdda2b64':
Verification: don't translate functions that are re-implemented from assembly to C
ARM Hyp: Fix fastpath_restore on ARM Hyp and implement slowpath and restore in C
SELFOUR-526: ARM - Implement slowpath and restore_user_context in C
Fixes a bug where previously MODEL_ID() was defined as:
`#define MODEL_ID(x) ( ((x & 0xf0000) >> 16) + (x & 0xf0) )`
This was incorrect because (1) it didn't take into account the conditional
nature of the extended_model_ID, and (2) it's actually shifting the
extended_model_ID into the low bits and keeping the model_ID in the high bits,
when it should be the other way around.
This patch also introduces a foundation for more sane testing of CPU vendor,
family, model and brand_ID.
* commit 'cee1268e9bf9619b60bd85cfda0a5d5306e8cf8a':
[VER-619] Pass verification related to newly added built-in unreachable
SELFOUR-545: x86 - cleanup c_traps.c file and use new traps.h
SELFOUR-526: ARM - dummy unreachable statements after fastpath calls
SELFOUR-526: ARM - Unify C entry point for system calls
This commit moves setThreadState outside the 'perform' stage of the
invocation, and renames decodeARMIOUnmapInvocation to
performPageInvocationUnmapIO as it is actually doing a perform
and not a decode
