GCC accepts MCR/MRC instructions to modify fpu control registers. Clang
does not. VMSR/VMRS are instructions that the ARM specification suggests
to use when accessing fpu control registers.
We currently only support Sv39 on RV64. Sv39 has a cannonical address
range of -2^38 and 2^38-1. This means that bits 63-39 must be equal to
bit 38, or that we sign extend from bit 39 to 63 based on the value of
bit 38. It also means that we only have 39 bits of addressable space,
which limits our max untype size.
This change fixes support for instances where we have
multiple kernel devices in the same page, or kernel devices
which aren't at page-aligned addresses.
Also use seL4_UserTop to pick the right address to start
putting the kernel device pages.
Note that the auto-generated kernel_devices will differ slightly from
the ones present in the kernel until now. When devices have
registers that aren't page-aligned we now always set the appropriate
PPTR to be the start address of the device, while previously the PPTR
was sometimes page-aligned.
Specifically, this change to PPTRs affects:
- bcm2837 intc
- bcm2837 uart
- allwinnerA20 timer
doRemoteOp1Arg data1 and cpu arguments were switched,
which triggered a conditional statement preventing
the VM from exiting and handling a bound notification.
Change-Id: I019faeaf0c7d51ef7f6b2a2ffa83bea1cf76f811
* Also document the reason why the particular address for KS_LOG_PPTR was chosen.
This patch adds a pointer to the PD entry that sets the benchmark log frame.
Previously the kernel did not call vcpu_switch on the fastpath since the fastpath avoids
calling setVMRoot, so when sending an IPC message from a guest thread to a native thread,
if the IPC was small enough to go on the fastpath the kernel would fail to disable the
HYP traps and would treat the native thread like a guest thread.
aarch64 hyp mode only has support for 8 bit hardware ASIDs. We use the
same strategy used in aarch32 for hardware asids where we maintain a
pool of hwasids that seL4 ASIDs are allocated. The allocation is stored
in the last entry of top level paging structure. This commit
encapsulates this into the bitfield specification in the same way as
aarch32.
- seL4_UserTop is a new constant which represents the top of virtual
memory available to user level
- this commit also rationalises several constants (USER_TOP, kernelBase)
and moves them to the arch level, such that ports only need to define
seL4_UserTop.
GrantReply is a new access right added to endpoint capabilities, which
allows seL4_Call to be used on those capabilities (specifically, it
allows reply caps *only* to be granted across endpoints).
Prior to the addition of GrantReply, endpoint capabilities required the
Grant access right, which allowed any arbitrary capabilitiy to be
transferred over an endpoint. Using GrantReply, systems can now be
constructed where threads using seL4_Call over an endpoint do not need to be in the same
security subsystem.
The registers a7, s2-11, and t3-6 were missing from seL4_UserContext.
We also add these to frameRegisters and gpRegisters, which are used
to implement the TCB invocations for reading and writing these
registers.
Zero-length arrays aren't valid expressions or types in ISO C, so
to keep the c parser happy we need to either remove gpRegisters or
provide some contents for it.
In the past, frameRegisters and gpRegisters distinguished between
those registers preserved across a syscall and those that weren't.
TCB_CopyRegisters allows the caller to choose which set to copy.
Since we preserve all non-return registers, this distinction isn't
relevant anymore and there's no easy way to justify the members of
frameRegisters and gpRegisters.
We arbitrarily choose to put the 'last' register t6 in gpRegisters,
for consistency with the register list in registerset.h and with the
order that registers are restored.
