Adrian Danis
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4ebe773fb9
|
riscv: VMWriteOnly vm right
Unlike other architectures riscv supports write only mappings and it simplifies management
of cap rights to actually support it.
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2018-04-18 10:10:14 +10:00 |
|
Adrian Danis
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08433f89a5
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riscv: Larger capFVMRights field
We are going to increase the number of items the vm_rights_t enumeration and so this
field needs to be larger to hold those values.
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2018-04-18 10:10:14 +10:00 |
|
Adrian Danis
|
5b17cd9648
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riscv: Missing arch cap abstractions
These are needed after rebase
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2018-04-18 10:10:14 +10:00 |
|
Adrian Danis
|
aafa594258
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RISCV: Place TODOs in the source
|
2018-04-18 10:10:14 +10:00 |
|
Hesham Almatary
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83ba084713
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[SELFOUR-1156] RISC-V Port
Experimental release that supports both RV32 and RV64
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2018-04-18 10:10:14 +10:00 |
|
Yanyan Shen
|
f97604c34e
|
armv8/hyp: Add VMID reuse code
|
2018-04-17 15:32:48 +10:00 |
|
Yanyan Shen
|
d23a02f3e4
|
armv8/hyp: Add HW ASID variables
|
2018-04-17 15:32:48 +10:00 |
|
Yanyan Shen
|
f7fd200255
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armv8/hyp: Replace register strings with macros
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
572daddc19
|
armv8/hyp: Define control register macros
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
12c8fe62d8
|
armv8/hyp: Clarify SCTLR_EL1 macros
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
280609cb60
|
armv8/hyp: Fix style
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
dd51a8b414
|
armv8/hyp: sharable -> shareable
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
507fcf8b55
|
armv8/hyp: Use macros to replace raw numbers
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
abbbe5ae32
|
armv8/hyp: Add start level macros for 4KB granule
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
3073195181
|
armv8/hyp: Add cacheability attribute macros
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
692a44249c
|
armv8/hyp: Add shareability attribute macros
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
b0738044c6
|
armv8/hyp: Add translation granule size macros
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
7ad03187c1
|
armv8/hyp: Add PA size constants
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
a0f19150b5
|
armv8/hyp: Move macros to the beginning
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
7427a48b96
|
armv8/hyp: Add read/writeVCPUReg functions
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
e17ad71292
|
armv8/hyp: Add armv_vcpu_init function
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
27271ca6d7
|
armv8/hyp: Add armv_vcpu_disable function
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
dae33077b7
|
armv8/hyp: Add armv_vcpu_enable function
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
6bcd6c5f26
|
armv8/hyp: Add armv_vcpu_boot_init
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
a28e25f844
|
armv8/hyp: Add vcpu_init_vtcr; use 44-bit IPA/PA
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
daade55a97
|
armv8/hyp: Add macros to access VTCR_EL2 fields
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
110ad2f0ad
|
armv8/hyp: Add arch_handleVCPUFault
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
826ce029c0
|
armv8/hyp: Add VCPU register access functions
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
db3e0b0c89
|
armv8/hyp: Add vcpu_hw_read/write_reg functions
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
3f36002ed5
|
armv8/hyp: Add functions to access registers
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
404ce2a9c9
|
armv8/hyp: Add SCTLR constants for A57
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
817819100d
|
armv8/hyp: Add HCR_COMMON/_NATIVE/_VCPU
|
2018-04-13 09:51:41 +10:00 |
|
Yanyan Shen
|
0261b7275c
|
armv8/hyp: Add aarch64 HCR fields
|
2018-04-13 09:51:41 +10:00 |
|
Anna Lyons
|
cbb862d865
|
trivial: s/framSizeConstants/frameSizeConstants
|
2018-04-12 10:40:40 +10:00 |
|
Yanyan Shen
|
f51c830869
|
arm/gic: Guard struct gich_vcpu_ctrl_map
|
2018-04-06 13:44:53 +10:00 |
|
Yanyan Shen
|
bc162cae6a
|
armv7/hyp: Move v7 hyp code to armv7-a/armv/vcpu.h
|
2018-04-06 13:44:53 +10:00 |
|
Yanyan Shen
|
7f7a12c383
|
arm/hyp: uint32_t -> word_t
|
2018-04-06 13:44:53 +10:00 |
|
Yanyan Shen
|
e2bb6b2949
|
arm/hyp: Move common HCR macros to vcpu.h
|
2018-04-06 13:44:53 +10:00 |
|
Yanyan Shen
|
094fddb79d
|
arm: Move VGIC code to gic_pl390 files
|
2018-04-06 13:44:53 +10:00 |
|
Yanyan Shen
|
7a20946b2c
|
armv8: Modify enableFpu/disableFpu to support EL2
|
2018-04-04 10:52:16 +10:00 |
|
Yanyan Shen
|
3d20232fd7
|
armv8: Add function isFpuEnabled
|
2018-04-04 10:52:16 +10:00 |
|
Yanyan Shen
|
6b9238a7be
|
armv8: Add disableFpuEL0
This function disables FPU access for EL0 only.
|
2018-04-04 10:52:16 +10:00 |
|
Yanyan Shen
|
e36e9cea58
|
armv8: Add enableFpuEL01
The function enables FPU access for both EL0 and EL1.
|
2018-04-04 10:52:16 +10:00 |
|
Yanyan Shen
|
b6f5329faa
|
armv8/hyp: Add EL2 FPU functions
enableTrapFpu: enable trapping any FPU related instructions to EL2.
disableTrapFpu: disable trapping FPU instructions to EL2.
|
2018-04-04 10:52:16 +10:00 |
|
Yanyan Shen
|
b95eb21782
|
armv8/tx1: Expose more devices to user mode
|
2018-04-03 10:34:01 +10:00 |
|
Yanyan Shen
|
fa0d3823e3
|
armv8/tx1: Fix a typo: Kb->KB
|
2018-04-03 10:34:01 +10:00 |
|
Yanyan Shen
|
a5a118458c
|
armv8/tx1: Handle VGIC_MAINTENANCE interrupts
|
2018-04-03 10:34:01 +10:00 |
|
Yanyan Shen
|
d8d006fab9
|
armv8/hyp: Add armHSCurVCPU and armHSVCPUActive
|
2018-03-28 12:15:09 +11:00 |
|
Yanyan Shen
|
2a7076177f
|
armv8: Use array regs in vcpu for aarch64
|
2018-03-28 12:15:09 +11:00 |
|
Yanyan Shen
|
0b71b332c1
|
armv8: Add VCPU_PTR and VCPU_REF
|
2018-03-28 12:15:09 +11:00 |
|