Commit graph

48 commits

Author SHA1 Message Date
Jimmy Brush
45344a9503 libsel4: idl: Fix more punctuation in errors
Signed-off-by: Jimmy Brush <code@jimmah.com>
2021-10-17 15:02:45 +11:00
Jimmy Brush
062eb3cb45 libsel4: idl: Fix punctuation in errors
Signed-off-by: Jimmy Brush <code@jimmah.com>
2021-10-17 15:02:45 +11:00
Jimmy Brush
1740abff65 libsel4: idl: Add ASID errors
Signed-off-by: Jimmy Brush <code@jimmah.com>
2021-10-17 15:02:45 +11:00
Jimmy Brush
73180e0e8d libsel4: Document errors in IDL
Also, remove any detailed discussion of error codes from method
descriptions.

Fixes #499

Signed-off-by: Jimmy Brush <code@jimmah.com>
2021-10-17 15:02:45 +11:00
Axel Heider
e4256d48fa libsel4: unify seL4 type definitions
Signed-off-by: Axel Heider <axelheider@gmx.de>
2021-04-06 16:15:01 +10:00
Axel Heider
11c435b803 libsel4: unify definitions in simple_types.h
Signed-off-by: Axel Heider <axelheider@gmx.de>
2021-04-01 10:33:41 +10:00
Axel Heider
e86364c975 libsel4: add missing macros.h include
Signed-off-by: Axel Heider <axelheider@gmx.de>
2021-04-01 10:33:41 +10:00
Axel Heider
ffa5c74666 libsel4: remove HAVE_AUTOCONF
Today the file autoconf.h is created by the CMake build system and thus
HAVE_AUTOCONF is always defined. Time to get rid of some legacy by
removing the check if HAVE_AUTOCONF is set.

Signed-off-by: Axel Heider <axelheider@gmx.de>
2021-04-01 10:33:41 +10:00
Axel Heider
73bde900b1 trivial: remove empty lines
Signed-off-by: Axel Heider <axelheider@gmx.de>
2021-04-01 10:33:41 +10:00
Axel Heider
800b2444a1 trivial: style and formatting
Signed-off-by: Axel Heider <axelheider@gmx.de>
2021-03-03 11:47:23 +01:00
Curtis Millar
0d35551966
riscv: Implement benchmark log buffer
Can now perform benchmarks on the kernel using the log buffer to trace
kernel behavior.

Signed-off-by: Curtis Millar <curtis.millar@data61.csiro.au>
2020-12-03 10:31:16 +11:00
Gerwin Klein
5c1b81d9bb libsel4: fix license tags
These files should have been released under BSD-2-Clause in the first
place (as per parent LICENSE.md file).

Closes #245

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-09-04 20:30:01 +08:00
Saer Debel
a221ee1ca8 Enabled IPC debug features under new config
Introduced a new config flag to enable
userError format strings to be written to the IPC buffer.
Another config bool has been introduced to toggle
printing the error out and this can also be set at runtime.

Signed-off-by: Saer Debel <saer.debel@data61.csiro.au>
2020-04-06 14:21:46 +10:00
Qian Ge
512a0200de replacing all ifndef with pargma once
All the kernel header files now use pargma once rather than the ifndef,
as the pre-processed C files do not change while header files
are protected with pargma once. This will also solve any naming issues
caused by ifndef.
2020-03-23 11:04:46 +11:00
Gerwin Klein
79da079239 Convert license tags to SPDX identifiers
This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.
2020-03-09 13:21:49 +08:00
Siwei Zhuang
dadfb1b6f3 trivial: Bugfix, use the correct config macro
Use the correct config macro to enable code injection.
2020-02-12 12:36:57 +11:00
amrzar
a4d6bf850c SELFOUR-161: Merge Page_Remap with Page_Map
- Remove Remap function from seL4 API for arm, x86, riscv and the
respective invocation implementation.
- Update Map as replacement for Remap
- Update manual

This allows a change of rights if the frame being mapped is already
mapped in at the given vaddr. To map a page to a different address,
unmap it first.

Co-authored-by: Hesham Almatary <hesham.almatary@data61.csiro.au>
Co-authored-by: Anna Lyons <Anna.Lyons@data61.csiro.au>
Co-authored-by: Victor Phan <Victor.Phan@data61.csiro.au>
Co-authored-by: Kent McLeod <Kent.Mcleod@data61.csiro.au>
2019-10-10 15:54:23 +11:00
Curtis Millar
d869b3adb7 mcs: Timeout fault and reply for RISC-V
Add fault and reply for timeout faults on RISC-V.
2019-08-27 10:46:13 +10:00
Curtis Millar
c45f2f0169 mcs: libsel4 for RISC-V
This uses the aarch64 code as a basis for implementing the full set of
new and updated libsel4 functions for RISC-V.
2019-08-27 10:46:13 +10:00
Curtis Millar
150916640e Add syscall for setting the current TLS register.
Some platforms and configurations do not allow user code to change the
value of the register used for TLS. On these architectures a syscall can
be used to allow the kernel to update the register on their behalf.

This does not immediately update the value in the user context on many
configurations as the values are only stored in the user context on a
context switch.
2019-07-01 11:17:49 +10:00
Curtis Millar
09d5e2454c Fix RISC-V registers to reflect calling convention 2019-07-01 10:46:46 +10:00
Curtis Millar
b6417f2150 Remove platform IPC buffer register.
This removes the assumption that each platform sotres the IPC buffer
address in a platform-specific register. The IPC buffer address is
instead stored in a thread-local variable in libsel4 which must be
initialised by the runtime.
2019-07-01 10:46:46 +10:00
Kent McLeod
4ce8f0a9f5 Add RISC-V IRQ invocations
We add support for seL4_IRQControlGet and seL4_IRQControlGetTrigger. If
a platform doesn't support setting the trigger, then
seL4_IRQControlGetTrigger will return an error. If the platform doesn't
have a PLIC driver, then it won't have any IRQs that can be requested.

Also authored by: Siwei Zhuang <siwei.zhuang@data61.csiro.au>
2019-06-18 10:22:47 +10:00
Anna Lyons
7fc45c4ef1 style: set code width to 120 2019-03-19 14:05:44 +11:00
Anna Lyons
d0930f67de style: consistently attach return type
Add attach-return-type to astyle
2019-03-19 14:05:36 +11:00
Anna Lyons
761006e03b style: consistently align pointer with name
Run astyle with align-pointer=name
2019-03-19 14:04:54 +11:00
Anna Lyons
3d10ef0c4d style: correct parenthesis padding
Use astyle's unpad-paren to unpad all parentheses that are not included
by pad-header, pad-oper, and pad-comma.
2019-03-19 14:02:59 +11:00
Edward Pierzchalski
4ea62e5158 riscv: add remaining registers to user context.
The registers a7, s2-11, and t3-6 were missing from seL4_UserContext.
We also add these to frameRegisters and gpRegisters, which are used
to implement the TCB invocations for reading and writing these
registers.

Zero-length arrays aren't valid expressions or types in ISO C, so
to keep the c parser happy we need to either remove gpRegisters or
provide some contents for it.

In the past, frameRegisters and gpRegisters distinguished between
those registers preserved across a syscall and those that weren't.
TCB_CopyRegisters allows the caller to choose which set to copy.

Since we preserve all non-return registers, this distinction isn't
relevant anymore and there's no easy way to justify the members of
frameRegisters and gpRegisters.

We arbitrarily choose to put the 'last' register t6 in gpRegisters,
for consistency with the register list in registerset.h and with the
order that registers are restored.
2018-12-06 15:04:41 +11:00
Jimmy Brush
71a2c5384e
[libsel4] fix building with LibSel4FunctionAttributes
Correct exported functions that were still defined as 'static inline' to
use LIBSEL4_INLINE_FUNC so that they can be controlled by
LibSel4FunctionAttributes.

This is important to other languages that want to bind to the libsel4
static library instead of using the inline C functions.
2018-11-27 01:17:45 -05:00
Anna Lyons
17b901d79f manual: clarify VSpace as top-level paging structure
This change updates the vspace chapter to separate the high-level concept of a VSpace from the
architectually defined objects. It also updates the various names for the vspace parameter to all be
vspace.
2018-05-11 16:14:09 +10:00
Anna Lyons
804fc54942 manual: update Page map documentation
- remove PD, PT references
- make clear that the middle level structures need mapping or an error is returned
2018-05-11 16:13:17 +10:00
Anna Lyons
ac01547562 manual: remove hard-coded PD, PT and Page invocations
- increases the maintainability of the docs
- move descriptions of methods to the API reference
- remove hardcoded invocations in manual

This commit removes the content completely from vspace.tex, as it is out of date and needs
restructuring. The next commit does the restructuring.
2018-05-11 16:13:08 +10:00
Anna Lyons
56abae43fb manual: remove hard-coded ASID invocations
- move documentation to API ref
- create tables pointing to the API ref for these objects
2018-05-11 16:13:06 +10:00
Adam Felizzi
8fd604eb13 manual: Added <docref> XML Tag to Doxygen
Introduced a new Doxygen XML tag '<docref>'. The intention of
this tag is to indicate a section of text in the Doxygen XML that
will contain a reference to another section in the Manual e.g.
"See \autoref<sec:x>". As other generation formats aren't aware of
other chapters/sections in the manual, the <docref> encapsulation
allows it to omit the text from the output. The Latex generator
has been modified to continue parsing the 'docref' contents.
2018-05-01 12:28:03 +10:00
Anna Lyons
d3feb06cdd riscv: fix licenses
- add files from elsewhere to the license ignore
- s/D61_BSD/DATA61_BSD
2018-04-18 10:52:02 +10:00
Anna Lyons
74b220158a trivial: fix whitespace 2018-04-18 10:10:14 +10:00
Anna Lyons
aae12426e9 riscv: document API methods 2018-04-18 10:10:14 +10:00
Anna Lyons
0764d2ac7d riscv: build on 32 bit 2018-04-18 10:10:14 +10:00
Anna Lyons
e58d076a58 riscv: make sel4arch.xml follow dtd 2018-04-18 10:10:14 +10:00
Anna Lyons
937d042395 riscv: fix style 2018-04-18 10:10:14 +10:00
Anna Lyons
90d3a694bd riscv: s/x3/gp and s/x4/tp in seL4_UserContext
This makes seL4_UserContext consistent with frameRegisters
2018-04-18 10:10:14 +10:00
Anna Lyons
6114fd3081 SELFOUR-1277: implement PageRemap for riscv 2018-04-18 10:10:14 +10:00
Anna Lyons
1dcd652546 riscv: kill tabs in sel4arch.xml 2018-04-18 10:10:14 +10:00
Adrian Danis
3d99437609 SELFOUR-1264: riscv: Missing brace
Adds missing brace in syscalls.h and restyle the code accordingly.
2018-04-18 10:10:14 +10:00
Kent McLeod
28bf273856 libsel4: Fix RISC-V type definitions 2018-04-18 10:10:14 +10:00
Adrian Danis
a8b2e0f919 riscv: seL4_RISCV_VMAttributes matches vm_attributes_t
Updates the user visible seL4_RISCV_VMAttributes definitions to match what is declared
in vm_attributes_t, which is just the executeNever attribute.
2018-04-18 10:10:14 +10:00
Adrian Danis
aafa594258 RISCV: Place TODOs in the source 2018-04-18 10:10:14 +10:00
Hesham Almatary
83ba084713 [SELFOUR-1156] RISC-V Port
Experimental release that supports both RV32 and RV64
2018-04-18 10:10:14 +10:00