Commit graph

21 commits

Author SHA1 Message Date
Jimmy Brush
45344a9503 libsel4: idl: Fix more punctuation in errors
Signed-off-by: Jimmy Brush <code@jimmah.com>
2021-10-17 15:02:45 +11:00
Jimmy Brush
062eb3cb45 libsel4: idl: Fix punctuation in errors
Signed-off-by: Jimmy Brush <code@jimmah.com>
2021-10-17 15:02:45 +11:00
Jimmy Brush
1740abff65 libsel4: idl: Add ASID errors
Signed-off-by: Jimmy Brush <code@jimmah.com>
2021-10-17 15:02:45 +11:00
Jimmy Brush
73180e0e8d libsel4: Document errors in IDL
Also, remove any detailed discussion of error codes from method
descriptions.

Fixes #499

Signed-off-by: Jimmy Brush <code@jimmah.com>
2021-10-17 15:02:45 +11:00
Gerwin Klein
79da079239 Convert license tags to SPDX identifiers
This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.
2020-03-09 13:21:49 +08:00
amrzar
a4d6bf850c SELFOUR-161: Merge Page_Remap with Page_Map
- Remove Remap function from seL4 API for arm, x86, riscv and the
respective invocation implementation.
- Update Map as replacement for Remap
- Update manual

This allows a change of rights if the frame being mapped is already
mapped in at the given vaddr. To map a page to a different address,
unmap it first.

Co-authored-by: Hesham Almatary <hesham.almatary@data61.csiro.au>
Co-authored-by: Anna Lyons <Anna.Lyons@data61.csiro.au>
Co-authored-by: Victor Phan <Victor.Phan@data61.csiro.au>
Co-authored-by: Kent McLeod <Kent.Mcleod@data61.csiro.au>
2019-10-10 15:54:23 +11:00
Curtis Millar
09d5e2454c Fix RISC-V registers to reflect calling convention 2019-07-01 10:46:46 +10:00
Kent McLeod
4ce8f0a9f5 Add RISC-V IRQ invocations
We add support for seL4_IRQControlGet and seL4_IRQControlGetTrigger. If
a platform doesn't support setting the trigger, then
seL4_IRQControlGetTrigger will return an error. If the platform doesn't
have a PLIC driver, then it won't have any IRQs that can be requested.

Also authored by: Siwei Zhuang <siwei.zhuang@data61.csiro.au>
2019-06-18 10:22:47 +10:00
Edward Pierzchalski
4ea62e5158 riscv: add remaining registers to user context.
The registers a7, s2-11, and t3-6 were missing from seL4_UserContext.
We also add these to frameRegisters and gpRegisters, which are used
to implement the TCB invocations for reading and writing these
registers.

Zero-length arrays aren't valid expressions or types in ISO C, so
to keep the c parser happy we need to either remove gpRegisters or
provide some contents for it.

In the past, frameRegisters and gpRegisters distinguished between
those registers preserved across a syscall and those that weren't.
TCB_CopyRegisters allows the caller to choose which set to copy.

Since we preserve all non-return registers, this distinction isn't
relevant anymore and there's no easy way to justify the members of
frameRegisters and gpRegisters.

We arbitrarily choose to put the 'last' register t6 in gpRegisters,
for consistency with the register list in registerset.h and with the
order that registers are restored.
2018-12-06 15:04:41 +11:00
Anna Lyons
17b901d79f manual: clarify VSpace as top-level paging structure
This change updates the vspace chapter to separate the high-level concept of a VSpace from the
architectually defined objects. It also updates the various names for the vspace parameter to all be
vspace.
2018-05-11 16:14:09 +10:00
Anna Lyons
804fc54942 manual: update Page map documentation
- remove PD, PT references
- make clear that the middle level structures need mapping or an error is returned
2018-05-11 16:13:17 +10:00
Anna Lyons
ac01547562 manual: remove hard-coded PD, PT and Page invocations
- increases the maintainability of the docs
- move descriptions of methods to the API reference
- remove hardcoded invocations in manual

This commit removes the content completely from vspace.tex, as it is out of date and needs
restructuring. The next commit does the restructuring.
2018-05-11 16:13:08 +10:00
Anna Lyons
56abae43fb manual: remove hard-coded ASID invocations
- move documentation to API ref
- create tables pointing to the API ref for these objects
2018-05-11 16:13:06 +10:00
Adam Felizzi
8fd604eb13 manual: Added <docref> XML Tag to Doxygen
Introduced a new Doxygen XML tag '<docref>'. The intention of
this tag is to indicate a section of text in the Doxygen XML that
will contain a reference to another section in the Manual e.g.
"See \autoref<sec:x>". As other generation formats aren't aware of
other chapters/sections in the manual, the <docref> encapsulation
allows it to omit the text from the output. The Latex generator
has been modified to continue parsing the 'docref' contents.
2018-05-01 12:28:03 +10:00
Anna Lyons
74b220158a trivial: fix whitespace 2018-04-18 10:10:14 +10:00
Anna Lyons
aae12426e9 riscv: document API methods 2018-04-18 10:10:14 +10:00
Anna Lyons
e58d076a58 riscv: make sel4arch.xml follow dtd 2018-04-18 10:10:14 +10:00
Anna Lyons
90d3a694bd riscv: s/x3/gp and s/x4/tp in seL4_UserContext
This makes seL4_UserContext consistent with frameRegisters
2018-04-18 10:10:14 +10:00
Anna Lyons
6114fd3081 SELFOUR-1277: implement PageRemap for riscv 2018-04-18 10:10:14 +10:00
Anna Lyons
1dcd652546 riscv: kill tabs in sel4arch.xml 2018-04-18 10:10:14 +10:00
Hesham Almatary
83ba084713 [SELFOUR-1156] RISC-V Port
Experimental release that supports both RV32 and RV64
2018-04-18 10:10:14 +10:00