Fábio Coutada
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| title | source | category | pages | extracted |
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| Platform Manual Ppc E500Mc | docs/platform/platform-manual-PPC_e500mc.pdf | platform | 80 | 2026-07-06T23:05:36.651807 |
Platform Manual Ppc E500Mc
Extracted from
docs/platform/platform-manual-PPC_e500mc.pdf(80 pages). Figures, diagrams, and tables may not render accurately in plain text.
PikeOS Platform Manual for e500mc Boards
Am Pfaffenstein 14, D-55270 Klein-Winternheim
Notice: The contents of this document are proprietary to SYSGO GmbH and shall not be disclosed, disseminated, copied, or used except for purposes expressly authorized in writing by SYSGO GmbH. PikeOS Platform Manual for e500mc Boards PikeOS D5.0, Document Version D5.0-200
c 2005 – 2019 SYSGO GmbH
SYSGO GmbH Email: office@sysgo.com Am Pfaffenstein 14 55270 Klein-Winternheim, Germany http://www.sysgo.com
All rights reserved. PikeOS is a trademark of SYSGO GmbH. The designations used to identify other software or hardware products in this publication may be trademarks of their manufacturers or sellers. Contents
1 About this Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 Boards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 Board Freescale QorIQ P2041RDB/P4080DS/T1040RDB . . . . . . . . . . . . . . . . . . . . . . 8 2.2.1 The Board Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2.1.1 Board Specific Note . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2.1.2 Component Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2.1.3 DTS/DTB/FDT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2.2 The PSP Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2.3 Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.3 Board Freescale QorIQ T2080QDS/T2080RDB/T4240QDS/T4240RDB . . . . . . . . . . . . . . . 11 2.3.1 The Board Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.3.1.1 Component Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.3.1.2 DTS/DTB/FDT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.3.2 The PSP Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.3.3 The PSSW Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.3.4 Running the Hello World Image . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.3.5 Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.4 Board CES MFCC-8558 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.4.1 The Board Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.4.1.1 Component Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.4.2 The PSP Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.4.3 The PSSW Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.4.4 Running a Boot Image . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.5 Board qemu-e500mc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2.5.1 The Board Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2.5.2 Set-up environment for QEMU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2.5.3 The PSP Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 2.5.4 The PSSW Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 2.5.5 Running the Hello World Image . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 2.5.6 Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3 PSPs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.2 Common PSP Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.3 IO Sequencer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.4 KDEV Drivers IO Memory Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.5 PSP p4080 e500mc, p4080-e6500 e500mc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.5.1 The PSP Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.5.2 PSP Specific Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.5.3 Interrupt Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.5.4 Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.5.5 Limiting the CPUs used . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
4 CONTENTS
3.6 PSP qemu-e500mc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.6.1 The PSP Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.6.2 Memory Size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.6.3 PSP Specific Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.6.4 Interrupt Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.6.5 Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
4 Boot Strategies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 4.1 U-Boot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 4.1.1 uboot_dtb and uboot_dtb_unc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 4.1.2 uboot and uboot_unc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 4.1.3 uboot_bare and uboot_bare_unc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 4.1.4 raw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 4.2 PPCMon . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 5 Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 5.1 Serial drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 5.1.1 Serial 8250 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 5.1.1.1 Driver Specific Configuration Parameters . . . . . . . . . . . . . . . . . . . . . . 37 5.1.1.2 Driver IOCTL Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 5.1.1.3 Driver Specific Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 5.1.1.4 User Level Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 5.1.1.5 Kernel Level Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 5.1.1.5.1 Kernel Fusion Project . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 5.1.1.5.2 Configuring the Integration Project . . . . . . . . . . . . . . . . . . . . . 39 5.2 Ethernet drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 5.2.1 Ethernet dpaafp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 5.2.2 Ethernet dpaa . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 5.2.2.1 Driver Base Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 5.2.2.2 Physical Device Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 5.2.2.3 Virtual Channel Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 5.2.2.4 Driver Specific Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 5.2.2.5 Board Specific Device Configuration . . . . . . . . . . . . . . . . . . . . . . . . . 47 5.2.3 Ethernet e1000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 5.2.3.1 Driver Base Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 5.2.3.2 Physical Device Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 5.2.3.3 BSP Configuration / PCI Device Configuration . . . . . . . . . . . . . . . . . . . . 49 5.2.3.4 Virtual Channel Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 5.2.3.5 Maximum Transfer Size Configuration . . . . . . . . . . . . . . . . . . . . . . . . 50 5.2.3.6 Driver Specific Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 5.2.4 Ethernet Realtek RTL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 5.2.4.1 Driver Base Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 5.2.4.2 Physical Device Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 5.2.4.3 BSP Configuration / PCI Device Configuration . . . . . . . . . . . . . . . . . . . . 53 5.2.4.4 Virtual Channel Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 5.2.4.5 Driver Specific Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 5.2.5 Ethernet virtio-net . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 5.2.5.1 Driver Base Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 5.2.5.2 Physical Device Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 5.2.5.3 Virtual Channel Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
CONTENTS 5
5.2.5.4 Maximum Transfer Size Configuration . . . . . . . . . . . . . . . . . . . . . . . . 56
5.2.5.5 Driver Specific Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
5.3 Block Device and MTD drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 5.3.1 Block Device and MTD Simulator blkdrvsim . . . . . . . . . . . . . . . . . . . . . . . . . . 56 5.3.1.1 Driver Specific Configuration Parameters . . . . . . . . . . . . . . . . . . . . . . 57 5.3.1.1.1 blkdrvsim Base Component . . . . . . . . . . . . . . . . . . . . . . . . 57 5.3.1.1.2 blkdrvsim Device Component . . . . . . . . . . . . . . . . . . . . . . . 57 5.3.1.2 Driver Specific Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 5.3.1.3 Usage of the User Level Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 5.3.1.3.1 Integration Project for the User Level Driver . . . . . . . . . . . . . . . . 58 5.3.1.4 Usage of the Kernel Level Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 5.3.1.4.1 Fusion Project for the Kernel Level Driver . . . . . . . . . . . . . . . . . 59 5.3.1.4.2 Integration Project for the Kernel Level Driver . . . . . . . . . . . . . . . 60 5.3.1.5 Demonstration Projects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 5.3.1.6 Driver Source Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 5.3.2 AHCI Block Device Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 5.3.2.1 Driver Specific Configuration Parameters . . . . . . . . . . . . . . . . . . . . . . 61 5.3.2.1.1 AHCI Base Component . . . . . . . . . . . . . . . . . . . . . . . . . . 61 5.3.2.1.2 AHCI Device Component . . . . . . . . . . . . . . . . . . . . . . . . . . 62 5.3.2.1.3 Operation Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 5.3.2.1.4 Speed Allowed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 5.3.2.1.5 BLK Devices for disk drive partitions . . . . . . . . . . . . . . . . . . . . 63 5.3.2.1.6 AHCI Device Partition Component . . . . . . . . . . . . . . . . . . . . . 63 5.3.2.2 User Level Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 5.3.2.3 Error Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 5.3.2.4 AHCI Emulation in the QEMU . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 5.3.2.5 Multiple AHCI Controllers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 5.3.2.6 Demonstration Projects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 5.3.3 Block uSDHC Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 5.3.4 Partitioned Image Creation Tool mkblkimage . . . . . . . . . . . . . . . . . . . . . . . . . 65 5.4 PCI Controller Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 5.4.1 PSP PCI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 6 The PikeOS CDK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 6.1 Target binaries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 A Architecture Dependencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 A.1 Supported Architectures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 A.1.1 ASP Variants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 A.2 Address Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 A.3 Basic Data Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 A.4 User Mode Context . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 A.4.1 Register Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 A.4.2 Short Context . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 A.4.3 FPU Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 A.4.4 TLS Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 A.5 Mapping Translations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 A.5.1 Translation of PikeOS Access Permissions to Architecture Specific Access Permissions . . . 71 A.5.2 Translation of Architecture Specific Access Permissions to PikeOS Access Permissions . . . 72 A.5.3 Supported Caching Attributes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
6 CONTENTS
A.5.4 VMIT Cache Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
A.6 Translation of Architecture Specific Exceptions to PikeOS Trap Codes . . . . . . . . . . . . . . . 73 A.7 Kernel Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 A.8 Cache Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 A.9 Cache Attributes Security . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 A.10 Speculative Execution Side Channels Mitigations - Meltdown and Spectre . . . . . . . . . . . . . 76 A.11 Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 B Boards Fusion/PSP Projects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 C Copyright Notices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 D Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
1 About this Manual
This manual describes additional platform specific information and supported boards for the PowerPC e500mc architecture. The manual is organized as follows. The Boards sub-chapters discuss the individual board support packages for each board. Each BSP chapter con- tains information about available drivers, board specific settings or pre-compiled system software with additional system extensions. The platform support packages (PSPs) chapter mimics the structure of BSP chapters and discusses more low level information and possible limitations. The Boot Strategies chapter discusses the setup of bootloaders for different boot strategies supported by the BSPs. The Drivers chapter discusses supported device drivers, the device driver configuration and usage. The CDK chapter provides information about the compiler usage and settings. The Architecture Dependencies chapter discusses various low level interfaces and information from the PikeOS kernel point of view. The Boards Fusion/PSP Projects chapter gives an overview of the coresponding kernel and PSSW fusion projects for each BSP.
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
2 Boards
2.1 Introduction
PikeOS supports multiple processor architectures and, for each architecture, multiple board types. This manual covers the PowerPC Book E e500mc architecture and the reference boards supported by PikeOS at the moment this manual was published. Processors complying to the PowerPC Book E e500mc are compatible in the following sense:
• They support the same application level instruction set. This means that a user application generated with
a toolchain for the PowerPC Book E family with classic FPU will run on any processor of this family, this
also includes the floating point instruction set.
• They share a similar cache model.
• They support a time base register.
• They share a similar interrupt model.
• They share a similar MMU model.
All PowerPC e500mc boards and respective PSPs have integrated PCI support. The boards (BSPs) have by default PCI Manager component. To list the PCI devices managed by the PCI Manager or change PCI manager configuration, please refer to PikeOS User Manual, section 10.7, page 244. The T2080/T4240 PCI support reads information about PCIe controllers from the FDT. If no is FDT supplied, PCI support is disabled.
2.2 Board Freescale QorIQ P2041RDB/P4080DS/T1040RDB
Freescale QorIQ P2041RDB/P4080DS/T1040RDB is a brand of Power Architecture-based reference design boards (RDB) or development systems (DS) for multicore processors from Freescale. The processors include high-performance data path acceleration logic and network and peripheral bus interfaces required for networking, telecom/datacom, wireless infrastructure, and aerospace applications. The processors are supported by the PikeOS PSP p4080. The PikeOS board names for the supported boards are:
• p2041rdb. The P2041RDB hosting a P2041 processor.
• p4080ds. The P4080DS hosting a P4080 processor (available only on demand).
• t1040rdb. The T1040RDB hosting a T1040 processor.
The core of the t1040rdb board is not an PPC e500mc, but an e5500, which supports the 64 bit mode. All cores will run in the 32 bit mode.
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
Board Freescale QorIQ P2041RDB/P4080DS/T1040RDB 9
2.2.1 The Board Configuration
PikeOS provides drivers and configuration for the following board resources:
• On-chip serial controllers (8250), section 5.1.1, page 37
• On-chip ethernet controllers (dpaa_config_fp, dpaa_portal_fp), section 5.2.1, page 40
PikeOS provides drivers and configuration for the following T1040RDB board resources:
• On-chip serial controllers (8250), section 5.1.1, page 37
• On-chip ethernet controllers (dpaa_config_fp, dpaa_portal_fp), section 5.2.1, page 40
• On-chip ethernet controllers (DDK), section 5.2.2, page 43
The drivers for the following resources are available on demand:
• On-chip GPIO controller (qoriq_gpio),
• External AHCI Controller (ahci), section 5.3.2, page 61
The PCI Manager component is automatically included. To list the PCI devices managed by the PCI Manager or change PCI Manager configuration, please refer to PikeOS User Manual, section 10.7, page 244.
2.2.1.1 Board Specific Note
The UARTs of the Freescale QorIQ P2041RDB/P4080DS/T1040RDB/T2080QDS/T2080RDB/T4240QDS/T4240RDB SoCs runs at different speed on the different boards.
2.2.1.2 Component Files
The configuration files of the board is stored in the following files:
/opt/pikeos-D5.0/target/ppc/e500mc/board/p2041rdb.bsp.dom /opt/pikeos-D5.0/target/ppc/e500mc/board/p4080ds.bsp.dom /opt/pikeos-D5.0/target/ppc/e500mc/board/t1040rdb.bsp.dom /opt/pikeos-D5.0/target/ppc/e500mc/board/p4080/*.cmp
The configuration items are stored as PikeOS properties. For the PSP properties see section 3, page 24.
Serial device configuration: Controls the settings of the RS-232 port.
The following PikeOS properties will be overwritten by the PSP during startup according to the actual CCB clock settings:
• config/provider/<provider_name>/io/0/ser/clock_speed
• config/provider/<provider_name>/io/1/ser/clock_speed
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
10 Boards
• config/provider/<provider_name>/io/2/ser/clock_speed
• config/provider/<provider_name>/io/3/ser/clock_speed
The properties are read by the serial file provider during startup. The PSP gets the actual values from the FDT which is explained in the next section or from the PSP property CCB_CLK. The <provider_name> is set by the "8250-base" component via "Provider Name" entry.
2.2.1.3 DTS/DTB/FDT
The configuration of the boards are stored in the following DTS files:
/opt/pikeos-D5.0/target/ppc/e500mc/board/p4080/dts/p2041rdb.dts /opt/pikeos-D5.0/target/ppc/e500mc/board/p4080/dts/p4080ds.dts /opt/pikeos-D5.0/target/ppc/e500mc/board/p4080/dts/t1040rdb.dts
The configuration items are stored as Device Tree Source (DTS). The DTS will be converted to a Device Tree Blob (DTB) which is added to the boot image. The U-Boot will write the actual configuration to the Flattened Device Tree (FDT) at boot time. The FDT will be added as additional ROM by the PSP. All ROMs are listed in the kernelinfo page. The values in the FDT override some configured PSP properties, see section 3.2, page 24.
Note: FDT is only used when the boot strategy is uboot_dtb or uboot_dtb_unc.
The following configuration data is captured there:
io: The available IO mappings.
Serial device configuration: Controls the settings of the RS-232 port.
smp: The SMP configuration.
Note: SMP will only work when the FDT is updated by U-Boot; i.e. a boot strategy with FDT support is used and the image is started with the full bootm sequence.
Besides this, the U-Boot supports more configuration parameters. The DTS file can be copied to the PikeOS integration project. When it is named uboot.dts, it will be used instead.
2.2.2 The PSP Configuration
For the PSP configuration options see section 3, page 24 and for PSP specific configuration options see section 3.5, page 28.
2.2.3 Limitations
See section 3.5, page 28 for the PSP limitations.
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
Board Freescale QorIQ T2080QDS/T2080RDB/T4240QDS/T4240RDB 11
2.3 Board Freescale QorIQ T2080QDS/T2080RDB/T4240QDS/T4240RDB
Freescale QorIQ T2080QDS/T2080RDB/T4240QDS/T4240RDB is a brand of Power Architecture-based reference design boards (RDB) or development systems (DS) from Freescale. The used multicore processors combine several dual-threaded e6500 Power Architecture processor cores with high-performance datapath acceleration logic and network and peripheral bus interfaces required for networking, telecom/datacom, data center, wireless infrastructure, and mil/aerospace applications. The processors are supported by the PikeOS PSP p4080-e6500. The PikeOS board names for the supported boards are:
• t2080qds. The T2080QDS hosting a T2080 processor.
• t2080rdb. The T2080RDB hosting a T2080 processor.
• t4240rdb. The T4240RDB hosting a T4240 processor.
• t4240qds. The T4240QDS hosting a T4240 processor (available only on demand).
The core of the boards is not a PPC e500mc but a PPC e6500, which supports the 64 bit computation mode, hardware assisted page table walk and dual-thread SMT. However, all cores will run in PPC e500mc compatibility mode which is 32 bit computation mode, software page table walk and no SMT.
2.3.1 The Board Configuration
PikeOS provides drivers and configuration for the following board resources:
• On-chip serial controllers (8250), section 5.1.1, page 37
• On-chip ethernet devices (dpaa_config_fp, dpaa_portal_fp), section 5.2.1, page 40
• On-chip ethernet devices (DDK), section 5.2.2, page 43
2.3.1.1 Component Files
The configuration files of the board is stored in the following files:
/opt/pikeos-D5.0/target/ppc/e500mc/board/t2080qds.bsp.dom /opt/pikeos-D5.0/target/ppc/e500mc/board/t2080rdb.bsp.dom /opt/pikeos-D5.0/target/ppc/e500mc/board/t4240qds.bsp.dom /opt/pikeos-D5.0/target/ppc/e500mc/board/t4240rdb.bsp.dom /opt/pikeos-D5.0/target/ppc/e500mc/board/p4080-e6500/*.cmp
The configuration items are stored as PikeOS properties. For the PSP properties see section 3, page 24.
Serial device configuration: Controls the settings of the RS-232 port.
The following PikeOS properties will be overwritten by the PSP during startup according to the actual CCB clock settings:
• config/provider/<provider_name>/io/0/ser/clock_speed
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
12 Boards
• config/provider/<provider_name>/io/1/ser/clock_speed
• config/provider/<provider_name>/io/2/ser/clock_speed
• config/provider/<provider_name>/io/3/ser/clock_speed
The properties are read by the serial file provider during startup. The PSP gets the actual values from the FDT which is explained in the next section or from the PSP property CCB_CLK. The <provider_name> is set by the "8250-base" component via "Provider Name" entry.
2.3.1.2 DTS/DTB/FDT
The configuration of the boards are stored in the following DTS files:
/opt/pikeos-D5.0/target/ppc/e500mc/board/p4080-e6500/dts/t2080qds.dts /opt/pikeos-D5.0/target/ppc/e500mc/board/p4080-e6500/dts/t2080rdb.dts /opt/pikeos-D5.0/target/ppc/e500mc/board/p4080-e6500/dts/t4240qds.dts /opt/pikeos-D5.0/target/ppc/e500mc/board/p4080-e6500/dts/t4240rdb.dts
The configuration items are stored as Device Tree Source (DTS). The DTS will be converted to a Device Tree Blob (DTB) which is added to the boot image. The U-Boot will write the actual configuration to the Flattened Device Tree (FDT) at boot time. The FDT will be added as additional ROM by the PSP. All ROMs are listed in the kernelinfo page. The values in the FDT override some configured PSP properties, see section 3.2, page 24.
Note: FDT is only used when the boot strategy is uboot_dtb or uboot_dtb_unc.
The following configuration data is captured there:
io: The available IO mappings (PCI).
Serial device configuration: Controls the settings of the RS-232 port.
smp: The SMP configuration.
Note: SMP and PCI will only work when the FDT is updated by U-Boot; i.e. a boot strategy with FDT support is used and the image is started with the full bootm sequence.
Note: For PCI the FDT needs to contain an element which is compatible with fsl,qoriq-pcie-vX.Y where X.Y can be 2.0 to 2.4 and 3.0. The FDT needs to provide nodes for reg and pcie/interrupt-map.
Besides this, the U-Boot supports more configuration parameters. The DTS file can be copied to the PikeOS integration project. When it is named uboot.dts, it will be used instead.
2.3.2 The PSP Configuration
For the PSP configuration options see section 3, page 24 and for PSP specific configuration options see section 3.5, page 28.
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
Board Freescale QorIQ T2080QDS/T2080RDB/T4240QDS/T4240RDB 13
2.3.3 The PSSW Configuration
The PCI Manager component is automatically included. To list the PCI devices managed by the PCI Manager or change PCI manager configuration, please refer to PikeOS User Manual, section 10.7, page 244.
2.3.4 Running the Hello World Image
The PikeOS distribution contains a ROM image which can be used to verify that development host and target are setup correctly. This section explains only the steps of the setup and boot procedure which are specific to the p2041rdb, p4080ds, t1040rdb, t2080qds, t2080rdb, t4240qds and t4240rdb boards. If you are not familiar with DHCP and terminal emulations like kermit or minicom, please take a look at the PikeOS User Manual. For all questions related to the U-Boot firmware, please use the command line help system of U-Boot or refer to the documentation which comes with the board. The boards are shipped with the U-Boot firmware already installed in the boards’ flash. The U-Boot firmware can be used to download and start a PikeOS image. To download and run the pre-compiled "Hello World" image, perform the following steps:
• Connect the first serial interface of the target with a serial port on your development host using a nullmodem cable ( p4080ds, t1040rdb, t2080qds, t2080rdb, t4240qds and t4240rdb) or a 1:1 cable (p2041rdb) . The boards are shipped with the default communication parameters 115200,8N1 (115200 baud, 8 data bits, no parity bit, and 1 stop bit).
• Connect an ethernet interface of the target to your network.
• Start a terminal emulation program like kermit or minicom on your development host with the proper communication parameters. You have to switch carrier detection off.
• If you now reset the board, you should see the boot message of the U-Boot firmware. The output should look like:
U-Boot 2013.01 (Jul 15 2013 - 17:36:06)
CPU0: P5040E, Version: 1.0, (0x820c0010)
Core: E5500, Version: 1.1, (0x80240011)
Clock Configuration:
CPU0:2266.667 MHz, CPU1:2266.667 MHz, CPU2:2266.667 MHz, CPU3:2266.667 MHz,
CCB:800 MHz,
DDR:800 MHz (1600 MT/s data rate) (Asynchronous), LBC:100 MHz
FMAN1: 600 MHz
FMAN2: 600 MHz
QMAN: 400 MHz
L1: D-cache 32 kB enabled
I-cache 32 kB enabled
Board: P5040DS, Sys ID: 0x20, Sys Ver: 0x02, FPGA Ver: 0x02, vBank: 4
Reset Configuration Word (RCW):
00000000: 0c580000 00000000 22121200 00000000
00000010: d49c4400 00283000 fe800000 61000000
00000020: 00000000 00000000 00000000 10070000
00000030: 00000000 00000000 00000000 00000000
SERDES Reference Clocks: Bank1=100Mhz Bank2=125Mhz Bank3=125Mhz Bank4=125Mhz
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
14 Boards
I2C: ready
SPI: ready
DRAM: Initializing....using SPD
Detected UDIMM i-DIMM
Detected UDIMM i-DIMM
6 GiB left unmapped
8 GiB (DDR3, 64-bit, CL=11, ECC on)
DDR Controller Interleaving Mode: cache line
DDR Chip-Select Interleaving Mode: CS0+CS1
Testing 0x00000000 - 0x7fffffff
Testing 0x80000000 - 0xffffffff
Testing 0x100000000 - 0x17fffffff
Testing 0x180000000 - 0x1ffffffff
Remap DDR 6 GiB left unmapped
POST memory PASSED
Flash: 128 MiB
L2: 512 KB enabled
Corenet Platform Cache: 2048 KB enabled
NAND: 512 MiB
MMC: FSL_SDHC: 0
EEPROM: NXID v1
PCIe1: Root Complex, no link, regs @ 0xfe200000
PCIe1: Bus 00 - 00
PCIe2: Root Complex, no link, regs @ 0xfe201000
PCIe2: Bus 01 - 01
PCIe3: disabled
In: serial
Out: serial
Err: serial
Net: Initializing Fman
Fman1: Uploading microcode version 106.1.9
PHY reset timed out
PHY reset timed out
PHY reset timed out
Fman2: Uploading microcode version 106.1.9
FM1@DTSEC3, FM1@DTSEC4, FM1@DTSEC5, FM1@TGEC1, FM2@DTSEC5 [PRIME]
Hit any key to stop autoboot: 0
=>
• Hit a key to stop the boot process.
• The serial port should already operate at 115200 baud since this is the baudrate used by the "Hello World"
image. If this is not the case for your board, execute the U-Boot command:
=> setenv baudrate 115200
After doing this, you have to disconnect your terminal session and adapt the baud rate setting of your
terminal. If you reconnect your terminal session, you have to press ENTER before you will see the U-Boot
prompt again.
• It is recommended to disable mp_holdoff when starting a PikeOS kernel with SMP support via the U-Boot
command bootm. This is the default in U-Boot.
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
Board Freescale QorIQ T2080QDS/T2080RDB/T4240QDS/T4240RDB 15
=> setenv mp_holdoff
• For Freescale QorIQ T2080QDS/T2080RDB/T4240QDS/T4240RDB boards it is recommended to enable mp_holdoff when starting a PikeOS kernel with SMP support via the U-Boot command bootm, because the U-Boot doesn’t fill in the start address of the cores in the DTB.
=> setenv mp_holdoff 1
• It is recommended to select a primary ethernet interface to prevent the probing of all interfaces.
=> setenv ethprime FM2@DTSEC5
• Save the environment with the command:
=> saveenv
Saving Environment to Flash...
Un-Protected 1 sectors
Erasing Flash...
. done
Erased 1 sectors
Writing to Flash... 9....8....7....6....5....4....3....2....1....9....8....7....6
....5....4....3....2....1....done
Protected 1 sectors
• Reset the board to get the configuration activated:
=> reset
• Configure the DHCP server on your host to provide a network configuration for the target including the name of the boot file /tftpboot/boot.img.
• Copy the binary image into the TFTP boot directory and name it img.boot. Make sure that it has read permission for world. Choose the bootimage depending on your board:
Board P2041RDB
sh# cp ${PIKEOS_TARGET_FILES}/boot-images/simple-pikeos-p2041rdb-uboot_dtb \
/tftpboot/boot.img
sh# chmod a+r /tftpboot/boot.img
Board P4080DS
sh# cp ${PIKEOS_TARGET_FILES}/boot-images/simple-pikeos-p4080ds-uboot_dtb \
/tftpboot/boot.img
sh# chmod a+r /tftpboot/boot.img
Board T1040RDB
sh# cp ${PIKEOS_TARGET_FILES}/boot-images/simple-pikeos-t1040rdb-uboot_dtb \
/tftpboot/boot.img
sh# chmod a+r /tftpboot/boot.img
Board T2080QDS
sh# cp ${PIKEOS_TARGET_FILES}/boot-images/simple-pikeos-t2080qds-uboot_dtb \
/tftpboot/boot.img
sh# chmod a+r /tftpboot/boot.img
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16 Boards
Board T2080RDB
sh# cp ${PIKEOS_TARGET_FILES}/boot-images/simple-pikeos-t2080rdb-uboot_dtb \
/tftpboot/boot.img
sh# chmod a+r /tftpboot/boot.img
Board T4240QDS
sh# cp ${PIKEOS_TARGET_FILES}/boot-images/simple-pikeos-t4240qds-uboot_dtb \
/tftpboot/boot.img
sh# chmod a+r /tftpboot/boot.img
Board T4240RDB
sh# cp ${PIKEOS_TARGET_FILES}/boot-images/simple-pikeos-t4240rdb-uboot_dtb \
/tftpboot/boot.img
sh# chmod a+r /tftpboot/boot.img
• Start the download with the command:
=> bootp
You should see an output similar to:
BOOTP broadcast 1
DHCP client bound to address 192.168.1.47
Filename ’boot.img’.
Load address: 0x2000000
Loading: #################################################################
#################################################################
#################################################################
###############
4.1 MiB/s
done
Bytes transferred = 3075226 (2eec9a hex)
• If the download has completed successfully, run the image with the command:
=> bootm
U-Boot analyzes the image, prints some information about it and starts it:
PikeOS (C) Copyright SYSGO AG, Germany
ROM image build: devel-pikeos@builder.sysgo.com-250317-23:37
Kernel build: 4.2-1558, type: noassert tracesys smp standard
ASP: "ppc_e500mc" PowerPC E500MC
PSP build: 4.2-226
PSP: "p4080" e500mc 3.1 P4080E rev3.0
Features: RETAIL TRACER-SYSCALL OPT SMP(8/32)
Configuration limits:
respart: 63
task: 256
thread: 511
timepart: 63
priority: 256
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
Board CES MFCC-8558 17
interrupts: 512
TP windows: 256
thr sstack: 4096 B
Resource partition 0 kernel memory refill strategy: dynamic (on demand)
Time stamp counter clock: 49999 kHz, user accessible
System ticker: dynamic mode, resolution 10000 ns
Time partition switch: 10000000 ns, watchdog timeout: 10000000 ns
Free memory: 2061084 KiB
PikeOS PCI Manager KDEV, Build: 4.2-172
PSSW +Ext. FPs +Messages (Production), Build: 4.2-3587
dpaa_config unsupported soc 0x00008200
dpaa_config: Board Freescale P4080DS
dpaa_portal0: Board Freescale P4080DS
dpaa_portal1: Board Freescale P4080DS
Devices Configuration:
FM1 MAC2 RGMII
FM2 SGMII (all 4) Bank1
FM2 has 10G Bank2
DPAA: Port_1G_fm2_p1 configured to auto-negotiation
DPAA: Port_1G_fm1_p2 configured to auto-negotiation
8250: Provider "ser0" started, Build: 4.2-155 Production
Hello World, starting up.
Hello World, this is task 22, thread 0
Hello World, this is task 22, thread 0
...
There are only 4 MAC addresses configured, because the dpaa_portal driver only supports 4. The
dpaa_config driver supports up to 8 MAC addresses. The driver prints a message that it can’t config-
ure the remaining MAC addresses. The dpaa_config driver tries to use the same MAC address as used by
the u-boot. As the u-boot only configures the MAC address for active interfaces, this works only for the inter-
face where the boot image was loaded from. In this case it was not booted from the Port_1G_fm1_p5_mac,
therefore it uses the fall back value which is configured in the boot image.
• If you save the boot command in the bootcmd variable, this command will be executed automatically when
the board comes up.
=> setenv bootcmd bootp\;bootm
=> saveenv
Note: As the U-Boot bootloader is only able to handle compressed bootimages whose uncompressed size is not larger than 8MB, you should use the uncompressed strategy when your image exceeds this limit.
2.3.5 Limitations
See section 3.5, page 28 for the PSP limitations.
2.4 Board CES MFCC-8558
CES MFCC-8558 is a Power Architecture-based board with a Freescale/NXP T2080 SoC. The used multicore processors combine several dual-threaded e6500 Power Architecture processor cores with high-performance
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
18 Boards
datapath acceleration logic and network and peripheral bus interfaces required for networking, telecom/datacom, data center, wireless infrastructure, and mil/aerospace applications. The processors are supported by the PikeOS PSP p4080-e6500 The PikeOS board name for the supported board is:
• mfcc-8558. The MFCC-8558 hosting a T2080 processor.
The core of the board is not a PPC e500mc but a PPC e6500, which supports the 64 bit computation mode, hardware assisted page table walk and dual-thread SMT. However, all cores will run in PPC e500mc compatibility mode which is 32 bit computation mode, software page table walk and no SMT.
2.4.1 The Board Configuration
PikeOS provides drivers and configuration for the following board resources:
• On-chip serial controllers (8250), section 5.1.1, page 37
• On-chip ethernet devices (dpaa_config_fp, dpaa_portal_fp), section 5.2.2, page 43
When you setup the dpaa portals manually, you need to ensure that you set the correct PHY addresses also
• 1th external ethernet: PortName Port_1G_fm1_p2 PHYAddress 21
• 2nd external ethernet: PortName Port_1G_fm1_p1 PHYAddress 22
• on board - PortName Port_1G_fm1_p3 PHYAddress 16
The BSP may support PCI without FDT.
2.4.1.1 Component Files
The configuration files of the board is stored in the following files:
/opt/pikeos-D5.0/target/ppc/e500mc/board/mfcc-8558.bsp.dom /opt/pikeos-D5.0/target/ppc/e500mc/board/p4080-e6500/mfcc-8558-board-basis.cmp /opt/pikeos-D5.0/target/ppc/e500mc/board/p4080-e6500/mfcc-8558-dpaa-config.cmp
The configuration items are stored as PikeOS properties. For the PSP properties see section 3, page 24.
Serial device configuration: Controls the settings of the serial port.
The following PikeOS properties will be overwritten by the PSP during startup according to the actual CCB clock settings:
• config/provider/<provider_name>/io/0/ser/clock_speed
• config/provider/<provider_name>/io/1/ser/clock_speed
• config/provider/<provider_name>/io/2/ser/clock_speed
• config/provider/<provider_name>/io/3/ser/clock_speed
The properties are read by the serial file provider during startup. The PSP gets the actual values from the PSP property CCB_CLK. The <provider_name> is set by the 8250-base component via Provider Name entry.
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
Board CES MFCC-8558 19
2.4.2 The PSP Configuration
For the PSP configuration options see section 3, page 24.
2.4.3 The PSSW Configuration
The PCI Manager component is automatically included. To list the PCI devices managed by the PCI Manager or change PCI Manager configuration, please refer to PikeOS User Manual, section 10.7, page 244.
2.4.4 Running a Boot Image
To download and run the the PikeOS image, perform the following steps:
• Connect the USB cable of the target with a USB port on your development host. The board is shipped with the default communication parameters 115200,8N1 (115200 baud, 8 data bits, no parity bit, and 1 stop bit). The target provides 4 serial consoles. PikeOS is using the first console by default.
• Configure the target as described in section 4.2.
• If you now reset the board, you should see the boot message of the PPCMon firmware. The PikeOS boot image will automatically be loaded. The output should look like:
MiniMon
Leaving bootpage
Setting up LAW... done
Setting up IFC... done
Minimon for MFCC-8558. Identified CPLD: AA 0.0.4
Moving CCSRBAR... done
Initializing DDR3 CTRL... skipped
Performing DDR3 CTRL Memory Test pBIT... done
Performing DDR Memory Test pBIT... done
Zeroing DDR... done
Initializing Core Platform Cache... done
Switching to C environment...
<cesPpcmon6Core> copy, verify, done.
<cesLibC> copy, verify, done.
<cesOsApi> copy, verify, done.
<cesNetLib> copy, verify, done.
<cesCpuLib> copy, verify, done.
<cesMaintenance> copy, verify, done.
<cesNvramLib> copy, verify, done.
<cesShell> copy, verify, done.
<cesBridgeLib> copy, verify, done.
<cesResourceTable> copy, verify, done.
<cesSemLib> copy, verify, done.
<cesLogLib> copy, verify, done.
<cesBIT> copy, verify, done.
<cesXpcLib> copy, verify, done.
MiniMon:Starting PPCMon
PPCMon starting...
Minimon P-BIT: 0 Skipped 0 Failed 5 Passed
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
20 Boards
PPCMon Rev 6.03.02 Build 5034
Feb 17 2017 - 14:13:15
P Operation: NOR Flash 0 Status: [Passed]
P Operation: NOR Flash 1 Status: [Passed]
P Operation: Serial Flash 0 Status: [Passed]
P Operation: Timestamp Status: [Disabled]
P Operation: PROG WDog Status: [Passed]
P Operation: HWL WDog Status: [Passed]
Module Type: MFCC-8558AA42LN0 Serial: 18610106
CPU: QorIQ T2080 PPC e6500 Rev: 2.0 SOC Rev: 1.1
Core 0: 1.800 Core 1: 1.800 Core 2: 1.800 Core 3: 1.800
Memory Size: 4096 MB
CPU Bus Speed: 600 MHz
Local flash devices:
Dual Die Numonyx P30 (2x 128 MB)
Dual Die Numonyx P30 (2x 128 MB)
R1J56L
Spansion S25FL256S
Media not Detected
RAM Emulation
Reset State: Operating Maintenance Mode
Reset Cause: Cold start
CPLD rev: 0.0.4
I Operation: Nvram Status: [Passed]
I Operation: Serial I/O 0 Status: [Passed]
I Operation: Serial I/O 1 Status: [Passed]
I Operation: Serial I/O 2 Status: [Passed]
I Operation: Serial I/O 3 Status: [Passed]
I Operation: PCIe 0 Status: [Passed]
I Operation: PCIe 1 Status: [Passed]
I Operation: PCIe 2 Status: [Passed]
I Operation: NOR Flash 0 Status: [Passed]
I Operation: NOR Flash 1 Status: [Passed]
I Operation: SDHC 0 Status: [Passed]
I Operation: Ethernet 0 Status: [Passed]
I Operation: Ethernet 1 Status: [Passed]
I Operation: Ethernet 2 Status: [Passed]
I Operation: I2C Status: [Passed]
automatic boot using "boot_script": "delay (boot_delay) &&
tftp.b mfcc-8558/mfcc-8558.nbi 0x30000 && cn_pw 0 0x15 _0_ 0x1800 && go 0x30000"
-1
Device: eth1
Server: 172.24.13.2:69
Remote file: mfcc-8558/mfcc-8558.nbi
Performing TFTP GET to local buffer: 0x00030000
TFTP: 0x00177400
Received 0x0019174c bytes
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
Board CES MFCC-8558 21
Exit Status: Success
Interface 0, Phy 15, Register 00: 1800
FDT is not available.
SMP configuration error:
No DTB configuration for enable-method of CPU Thread 2
Please use boot strategy uboot_dtb or uboot_dtb_unc.
SMP configuration error:
No DTB configuration for enable-method of CPU Thread 4
Please use boot strategy uboot_dtb or uboot_dtb_unc.
SMP configuration error:
No DTB configuration for enable-method of CPU Thread 6
Please use boot strategy uboot_dtb or uboot_dtb_unc.
PikeOS (C) Copyright SYSGO AG, Germany
ROM image build: 5.0-10
Kernel build: 5.0-1691, type: noassert tracesys smp standard
ASP: "ppc_e500mc" PowerPC E500MC
PSP build: 5.0-236
PSP: "p4080-e6500" e6500 1.2.0; SoC T2080 rev1.1
Features: RETAIL TRACER-SYSCALL OPT SMP(4/32)
Configuration limits:
respart: 63
task: 256
thread: 511
timepart: 63
priority: 256
interrupts: 512
TP windows: 256
thr sstack: 4096 B
Resource partition 0 kernel memory refill strategy: dynamic (on demand)
Time stamp counter clock: 37500 kHz, user accessible
System ticker: dynamic mode, resolution 10000 ns
Time partition switch: 10000000 ns, watchdog timeout: 10000000 ns
Time partition synchronization: default
Free memory: 2061828 KiB
PikeOS PCI Manager KDEV, Build: 5.0-180
wdt: No init_bin_config() entry point
<DRV INFO> wdt: running on cpu 0
<DRV INFO> wdt: running on cpu 0
<DRV INFO> wdt: startup timeout interval:
<DRV INFO> wdt: requested: 10000000000ns closest used: 14316540000ns
<DRV INFO> wdt: timeout interval:
<DRV INFO> wdt: requested: 5000000000ns closest used: 7158240000ns
booke_wdt: Provider "wdt" started, Build: 5.0-6 Production
PSSW +Ext. FPs +Messages (Production), Build: 5.0-3631
dpaa_portal0: Board T2080
dpaa_config: Board T2080
DPAA: Port_1G_fm1_p2 configured to auto-negotiation
8250: Provider "ser0" started, Build: 5.0-162 Production
Hello World, starting up.
Hello World, this is task 22, thread 0
Failed to read eth0/chan/4/Cfg/MacAddr
DPAA: INFO: 00:80:a2:13:a8:b3 assigned to dev eth0:/0
DPAA: INFO: 00:e0:0c:00:d7:01 assigned to dev eth0:/1
DPAA: INFO: 00:e0:0c:00:d7:02 assigned to dev eth0:/2
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
22 Boards
DPAA: INFO: 00:e0:0c:00:d7:03 assigned to dev eth0:/3
PHY 21: Detected PHY ID 0x01410cc2 (auto negotiation may not work)
DPAA: Adjusted link of Port_1G_fm1_p2 to 1000 MBit/s, full duplex
Hello World, this is task 22, thread 0
Hello World, this is task 22, thread 0
Hello World, this is task 22, thread 0
...
It prints some warings that DTS/DTB/FDT is missing. PikeOS expects that the DTB is passed to via the r3
register when it is started. PPCMon doesn’t support this. To avoid the message you have to start PikeOS
the same way as Linux, but this requires tools which are not part of the PikeOS toolchain. There are only
4 MAC addresses configured, because the dpaa_portal driver only supports 4. The dpaa_config driver
supports up to 8 MAC addresses. The driver prints a message that it cannot configure the remaining MAC
addresses. The dpaa_config driver tries to use the same MAC address as used by the PPCMon. As the
PPCMon may only configure the MAC address for active interfaces, this may work only for the interface
where the boot image was loaded from.
2.5 Board qemu-e500mc
This board support package supports the QEMU emulated machine "ppce500". The Board qemu-e500mc board support package consists of the qemu-e500mc PSP, PikeOS system Software with PCI Manager included and drivers for serial, Ethernet and AHCI interfaces. The PikeOS board name for this board is Board qemu-e500mc.
2.5.1 The Board Configuration
PikeOS provides drivers and configuration for the following board resources:
• Serial controller (8250), section 5.1.1, page 37
• Ethernet controller (virtio-net), section 5.2.5, page 53
The drivers for the following resources are available on demand:
• AHCI controller (ahci), section 5.3.2, page 61
2.5.2 Set-up environment for QEMU
The QEMU virtio-net controller can be reached from outside of QEMU. The QEMU network setup is described in the detail in the PikeOS User Manual. To load and run the ROMimage with networking support, use the generated QEMU command line. By default, the virtio-net device is instantiated using ’-device virtio-net-pci,vlan=0’ command line option. By default, the driver matches ’byid/1af4/1000/1af4/0001/0000’ PCI device, which can be adjusted in the virtio-net device BSP settings. To enable QEMU’s serial line support, add the option ’-serial {device}’ to the QEMU command line, where {device} might be one of stdio, vc, pty, null.
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
Board qemu-e500mc 23
To enable QEMU’s AHCI support emulation, open the integration project, locate a AHCI Device Component and enable the device emulation by switching the Enable checkbox on (parameter EMULATE), then in the Drive Image File (parameter DRIVE_IMAGE) parameter select a image file and configure the Physical Block Size of emulated device (parameter BLOCK_SIZE). The QEMU’s boot strategy script will execute QEMU with required arguments. There is preconfigured demo image for AHCI Device located in the "PIKEOS/share/mkblkimage/blkdemo.image". This image if it is configured, will be copied into integration project directory upon the first boot. See the README in the mkblkimage demo directory for details about this image.
2.5.3 The PSP Configuration
For the PSP configuration options see section 3.6, page 32.
2.5.4 The PSSW Configuration
The PCI Manager component is automatically included. To list the PCI devices managed by the PCI Manager or change PCI manager configuration, please refer to PikeOS User Manual, section 10.7, page 244.
2.5.5 Running the Hello World Image
The PikeOS distribution contains a ROMimage which can be used to verify that development host and target are set up correctly. This section explains the steps of the setup and boot procedure which are specific to the Board qemu-e500mc board. To load and run the pre-compiled "Hello World" image, start QEMU with the following command:
sh# /opt/pikeos-D5.0/target/ppc/e500mc/boot-images/simple-pikeos-qemu-e500mc-qemu.qemu_cmdline
2.5.6 Limitations
See section 3.6, page 32 for the PSP limitations.
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
3 PSPs
3.1 Introduction
This chapter describes the supported platform support packages and their configuration. The first section de- scribes the common PSP properties which may be used to configure various options of the PSP. The following section discusses low level details, functionalities and limitations of each supported PSPs including PSP specific properties.
3.2 Common PSP Properties
Some features of the PSP can be controlled via properties which are specified in the RBX file. This section describes the available PSP properties for the different PSPs. The default value is used if the corresponding property is not specified. Table 1 lists the PSP properties and their default values for all PPC e500mc based PSPs.
Path Type Default
psp/console/port uint32 1
This property specifies the console output port. The value 0 disables the console output, a value of 1 or 2
cause the console output to be directed to the first or second UART channel. Any other value disables the
console output.
psp/debug/port uint32 1
This property specifies the debug port. The value 0 disables the debug port, values 1 or 2 cause debug data
to be directed to the serial controller 1 or 2. Application debugging uses muxa channels, not this interface.
psp/console/baudrate uint32 115200
This property specifies the baud rate for the console port. Possible values are 9600, 19200, 38400, 57600,
and 115200.
psp/memory/size uint64 0x80000000 (2 GiB),
FDT:/memory/reg
This property, if present, specifies the amount of memory to use for the system application. It is modified if
the FDT is used.
psp/ccsrbar uint32 0x0000000F FE000000,
FDT:/soc/reg,
SPR SCCSRBAR on e6500
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
Common PSP Properties 25
Path Type Default This property specifies the position of the CCSRBAR (configuration, control, and status registers base address register). This position is shifted left by 24 bits to get the physical address. This address is usually set by the bootloader and the integrator needs to adopt this setting for the PSP to detect the CCSRBAR correctly. It is modified if the FDT is used. It is modified on e6500 by SPR SCCSRBAR when FDT is not used. The original value of the property is used to find physical addresses in the property file system which needs to be updated when the FDT or SPR SCCSRBAR has a different value. Updating the property file system ensures that the drivers will still work when booting on a system with a different CCSR BAR value.
psp/clock/ccb uint32 800000000 (800 MHz), FDT:/soc/bus-frequency This property specifies the core complex bus (CCB) clock frequency. It is modified if the FDT is used.
psp/cache/l2_enabled uint32 3 (data + instruction) (e5500) This property allows controls of the L2 cache behavior. The property values are as follows: value description 0 L2 disable 1 L2 instruction only 2 L2 data only 3 L2 data + instruction Note: The property is only supported on PowerPC e5500
psp/cache/l2_enabled uint32 0x001E1E1E (e6500) This property allows control of the L2 cache behavior. It is a bit field with 8 bits per CPU cluster. For CPU cluster 0 the layout is as follows (3 out of 8 bits are unused): bit description 0 enable/disable stashing allocation (not implemented, masked below) 1 enable/disable D-cache read allocation 2 enable/disable I-cache read allocation 3 enable/disable write allocation (D only) 4 enable/disable equi-partitioning
psp/io/DTB memmap 0x00000000,0x0 relocated by psp This property allows access of the DTB/FDT. The psp changes this entry to the actual physical address and size of the DTB/FDT. A PikeOS task or a driver can map the DTB via vm_prop_mem_map(). A library like libfdt can be used for reading the file.
psp/xmap_base uint32 0xfffff000 This property configures the virtual address used by the kernel for cross task memory copy operations. The kernel maps one page of the address space which is currently not active, but needs to be accessed. This address should not be used by any other component to map memory.
psp/memory/test bool false
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
26 PSPs
Path Type Default
This property provides a simple memory tester, which will test all PSP specified P4_MRT_URW regions. The
memory test consists of two passes. The first pass will fill all regions with the address pattern, second pass
fills the regions with the bit-inverted address pattern. The memtester checks if the address pattern matches
after each pass. The value 0 disables the feature, the value 1 enables this test.
Table 1: e500mc common PSP properties
Some of the kernel defined properties influence the PSP behavior. Please refer to the PikeOS Kernel Reference Manual, section 2, page 581.
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
IO Sequencer 27
3.3 IO Sequencer
IO Sequencer is a mechanism to allow a user to make simple board-specific register adjustments without writing a driver or a custom PSP. The adjustments to be made are described in the property file system, by default under the board/config/io_seq directory. The configuration consists of property sub-directories named 0 . . . n − 1, each describing a write to a memory location (presumably a memory-mapped register). The properties listed in table 2 are used to describe the memory operation.
addr addr Address of memory location that should be changed.
The address is a virtual address, translation depends on
the PSP.
value uint64 Value that should be written at the given address. Only
the lowest bytes matching the size property are used.
size uint32 Size of the memory write, either 1, 2, 4 or 8 bytes. If
the property is not present, the size is assumed to be 4
bytes.
mask uint64 Bitmask specifying which bytes should be changed. If the
property is not present, whole memory location is over-
written. If the property is present, the memory location is
read, masked with a one-complement of this mask and
ORed with the value property.
io_port uint32 This flag can be used to specify that the operation should
be performed on IO ports instead of MMIO. In that case,
size must not be 8 bytes and only the lower 16 bits of
addr are used. This flag is only supported on x86. If the
property is not specified, it is assumed to be false
Table 2: Memory operation properties
If any of the properties does not conform to the specification, the PSP will refuse to boot and print an error message. If console is available at the time when the IO sequencer runs (depends on the BSP), you can get verbose information about the operations performed by the IO sequencer by setting the UK_BOOT_MESSAGE kernel configuration parameter to Verbose boot. Unless noted otherwise in the corresponding PSP’s documentation, the IO sequencer configuration mechanism is supported by the PSP and the IO sequencer is run just after initializing the PSP console. As an example, the following snippet will configure the IO sequencer on x86 machines to write letter ’X’ to the serial port (assuming it is already configured).
<prop_dir name="board"> <prop_dir name="config"> <prop_dir name="io_seq"> <prop_dir name="0"> <prop_addr name="addr" data="0x3F8" /> <prop_uint64 name="value" data="0x58" /> <prop_uint32 name="size" data="1" /> <prop_bool name="io_port" data="true" />
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
</prop_dir>
</prop_dir>
</prop_dir> </prop_dir>
3.4 KDEV Drivers IO Memory Mapping
When a KDEV driver calls drv_io_phys_to_kernel() then kernel calls PSP to get mapped kernel virtual address for accessing a given IO physical address. A dedicated mapping is required to access IO resources: typically UNCACHED memory is used to access IO devices, while the mapping for kernel memory is cached. The PSP during boot time iterates through all memory requirement properties with type P4_PROP_T_MEMMAP in prop:board/io and check if they are covered by the existing mappings in PSP. If the mapping is not found then the following message is printed on the console:
Cannot add KDEV memory regions: feature is not supported by the ASP
If the whole memory area passed to drv_io_phys_to_kernel() is covered by a property in prop:board/io then it returns the corresponding kernel virtual address based on the information provided by the property.
3.5 PSP p4080 e500mc, p4080-e6500 e500mc
3.5.1 The PSP Configuration
The PSP and kernel properties and can be set within the PikeOS project through the project editor. The PSP specific properties are defined in this chapter. The common PSP properties are defined in the section 3.2, page 24. On the boards two serial devices are provided as RS-232 interface. By default, the PikeOS PSPs uses serial channel 1 as system console.
Warning: Concurrent use of serial interface as system console and 8250 driver may result in unexpected behavior.
The PikeOS system console is configured to use the communication parameters 115200,8N1 (115200 baud, 8 data bits, 1 stop bit and no parity bit).
3.5.2 PSP Specific Properties
The table 3 lists the PSP properties and their default values for the PSP. The type of the properties is prop_uint32.
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
PSP p4080 e500mc, p4080-e6500 e500mc 29
prop:psp/ Description Default value L3_ENABLE This PSP property controls the L3 cache-strategy behav- 3 (unchanged) ior (if the L3 cache is available on the board). The values are as follows: value description 0 disabled 1 write-through 2 copy-back 3 keep configuration from bootloader Note: This PSP property is only supported on Pow- erPC e5500 and e6500
Table 3: p4080-e500mc, p4080-e500mc-e6500 psp specific properties
3.5.3 Interrupt Assignment
The internal interrupts have an offset of 16. The table 5 lists external and internal interrupts.
IRQ Description
0-11 External Interrupts
12-15 Reserved
16 Error Interrupts
17 WRS
20 PCI Express 1
21 PCI Express 2
22 PCI Express 3
23 PCI Express 4
24 PAMU (violations)
25 Integrated Flash controller (IFC), eLBC
28 DMA 1 channel 1
29 DMA 1 channel 2
30 DMA 1 channel 3
31 DMA 1 channel 4
32 DMA 2 channel 1
33 DMA 2 channel 2
34 DMA 2 channel 3
35 DMA 2 channel 4
36 DUART 1
37 DUART 2
38 Dual I2C 1 (I2C1 and I2C2)
40 PCI Express 1 INTA
41 PCI Express 2 INTA
42 PCI Express 3 INTA
43 PCI Express 4 INTA
44 USB 1
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
30 PSPs
IRQ Description
45 USB 2
48 eSDHC
52 Perfomance Monitor
54 GPIO 2
55 GPIO 1
56 RapidIO outbound doorbell
57 RapidIO inbound doorbell
60 RapidIO outbound dmessage unit 1
61 RapidIO inbound dmessage unit 1
62 RapidIO outbound dmessage unit 2
63 RapidIO inbound dmessage unit 2
68 SATA 1
69 SATA 2
76 DMA 1 channel 5
77 DMA 1 channel 6
78 DMA 1 channel 7
79 DMA 1 channel 8
80 DMA 2 channel 5
81 DMA 2 channel 6
82 DMA 2 channel 7
83 DMA 2 channel 8
84 Event processing unit 1
85 Event processing unit 2
86 GPIO 3
87 GPIO 4
88 SEC job queue 1
89 SEC job queue 2
90 SEC job queue 3
91 SEC job queue 4
92 SEC global error
93 Security monitor
94 Event processing unit 3
95 Event processing unit 4
96 Frame manager 1
97 Frame manager 2
100 Ethernet management interface (MDIO 1) - 1G
101 Ethernet management interface (MDIO 1) - 10G
104 Queue manager portal 0
105 Buffer manager portal 0
106 Queue manager portal 1
107 Buffer manager portal 1
108 Queue manager portal 2
109 Buffer manager portal 2
110 Queue manager portal 3
111 Buffer manager portal 3
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PSP p4080 e500mc, p4080-e6500 e500mc 31
IRQ Description
112 Queue manager portal 4
113 Buffer manager portal 4
114 Queue manager portal 5
115 Buffer manager portal 5
116 Queue manager portal 6
117 Buffer manager portal 6
118 Queue manager portal 7
119 Buffer manager portal 7
120 Queue manager portal 8
121 Buffer manager portal 8
122 Queue manager portal 9
123 Buffer manager portal 9
124 Queue manager portal 10
125 Buffer manager portal 10
126 Queue manager portal 11
127 Buffer manager portal 11
128 Queue manager portal 12
129 Buffer manager portal 12
130 Queue manager portal 13
131 Buffer manager portal 13
132 Queue manager portal 14
133 Buffer manager portal 14
134 Queue manager portal 15
135 Buffer manager portal 15
136 Queue manager portal 16
137 Buffer manager portal 16
138 Queue manager portal 17
139 Buffer manager portal 17
Table 4: Interrupt Assignment
3.5.4 Limitations
The PSP supports 2016 MiByte of memory. The SGMII/QSGMII DPAA Ethernet devices are not supported on the t2080qds and t4240qds boards, i.e. only the on-board RGMII Ethernet devices are supported. PCI is not supported on T2080/T4240 based boards without FDT. For the PikeOS kernel e500mc related architecture limitations see section A.11, page 76.
3.5.5 Limiting the CPUs used
There are two ways how to limit the CPUs used by the PSP:
• the single-processor PSP version uses only the boot CPU
• the set of CPUs used by the SMP PSP version can be limited by the p4/kernel/num_cpu property
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
In any case, the PSP must start at CPU#0. Please note that any unused but active CPU might interfere with the PikeOS system. If any other CPU is held in a boot spin loop, it might be released when PikeOS writes to the memory area it is using, resulting in memory corruption or other system misbehavior. In order to check for this situation, the PSP reads the Boot Release Register (DCFG_CCSR_BRR) and if an active but unused CPU is found, the following warning is printed:
WARNING: There is at least one active CPU not controlled by PikeOS (cpumask=0x0000000E). WARNING: This might result in memory corruption or other system misbehavior. WARNING: Please consult the platform manual for details.
The cpumask value indicates CPUs that have been identified as active but are unused by PikeOS. The PSP then tries to remove the spin-table memory from the memory pool used by the PikeOS kernel. The physical memory address is read from the FDT from the "cpu-release-addr" path. In order to stay on the safe side, one page before and one page after this address is removed as well. Please note that even if the unmapping succeeds, there is no guarantee that the CPUs are not using any other memory block, and the memory corruption can still appear. If the p4/kernel/boot_message property is set to at least 3, the PSP will print the physical address range that is going to be unmapped; note that the message is printed even for memory that is not mapped:
Removing CPU#1 spin-table at 0x000000007FF32000...0x000000007FF34FFF from the memory map.
If reading the FDT fails, the following warning is printed:
WARNING: Unused CPU#1 is active, but its spin-table was not found.
In order to prevent any of these problems, mp_holdoff should be enabled in U-Boot:
=> setenv mp_holdoff 1 => saveenv => reset
3.6 PSP qemu-e500mc
3.6.1 The PSP Configuration
The PSP and kernel properties can be set within the PikeOS project through the project editor. The PSP specific properties are defined in this chapter. The common PSP properties are defined in the section 3.2, page 24. By default, the PikeOS PSPs uses serial channel 1 as system console.
Warning: Concurrent use of serial interface as system console and 8250 driver may result in unexpected behavior.
The PikeOS system console is configured to use the communication parameters 115200,8N1 (115200 baud, 8 data bits, 1 stop bit and no parity bit).
3.6.2 Memory Size
The PSP detects the memory size in QEMU. As a consequence the MEMSIZE property will be ignored. You need to modify the memory available through the -m argument.
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
PSP qemu-e500mc 33
3.6.3 PSP Specific Properties
None present.
3.6.4 Interrupt Assignment
The internal interrupts have an offset of 16. The table 5 lists external and internal interrupts.
IRQ Description
0-11 External Interrupts
12-15 Reserved
16-123 Internal Interrupts
Table 5: Interrupt Assignment
3.6.5 Limitations
The PSP supports 2016 MiB of memory. For the PikeOS kernel PPC e500mc related architecture limitations see section A.11, page 76.
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
4 Boot Strategies
This section describes the setup of bootloader for supported boot strategies.
4.1 U-Boot
4.1.1 uboot_dtb and uboot_dtb_unc
These boot strategies create a multiboot image with attached DTB. The following commands are recommended to configure U-Boot for booting uboot_dtb and uboot_dtb_unc images via DHCP and TFTP:
=> setenv mp_holdoff => setenv bootcmd bootp;bootm => saveenv => reset
DTS/FDT
The U-Boot is updating values in the FDT. The PSP reads the updated values from the FDT. These values override some configured PSP properties, see section 3.2, page 24. The PSP reads the path /cpus/Pow- erPC,eXXXXX@YY from the FDT to start the other cores, where eXXXXX is the format of the core type (e.g. e5500 or e6500). The actual value is printed in the welcome string when PikeOS is booting. YY is the core or thread number. The PSP will use even thread numbers for core e6500.
4.1.2 uboot and uboot_unc
These boot strategies create a Linux kernel image type. Recent U-Boot versions fail to load image of this type, and uboot_bare or uboot_bare_unc boot strategy needs to be used. The commands recommended to load the image are the same as for uboot_dtb.
4.1.3 uboot_bare and uboot_bare_unc
These boot strategies create a standalone image type. The commands recommended to load the image are the same as for uboot_dtb.
4.1.4 raw
The following commands are recommended to configure U-Boot for booting raw images via DHCP and TFTP for psp p4080:
=> setenv mp_holdoff 1 => setenv bootcmd bootp 0x20000;go 0x20000 => saveenv => reset
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
PPCMon 35
The following commands are recommended to configure U-Boot for booting raw images via DHCP and TFTP for psp p4080-e6500:
=> setenv mp_holdoff 1 => setenv bootcmd bootp 0x30000;go 0x30000 => saveenv => reset
The load address is different because the t4240 supports more cores and needs therefore a larger boot stack. A PikeOS kernel with SMP only starts if mp_holdoff is enabled. The SMP kernel expects that the code is executed from SDRAM memory which is configured in LAW register. The TRGT_ID from the first matching LAW is used to setup the boot mapping for the cores. This is not needed when the caller passes a valid pointer to a DTB in register r3 when jumping to 0x20000 or 0x30000.
Note: It is recommended to use the boot strategies uboot_dtb or uboot_dtb_unc instead.
4.2 PPCMon
The only boot strategy suitable for PPCMon is the raw boot strategy. This section explains the steps of the setup and boot procedure parts specific to the PPCMon. If you are not familiar with TFTP and terminal emulations like kermit or minicom, please take a look at the PikeOS User Manual. For all questions related to the PPCMon firmware, please use the command line help system of PPCMon or refer to the documentation which comes with the board. The boards are shipped with the PPCMon firmware already installed in the boards’ flash. The PPCMon firmware can be used to download and start a PikeOS image. To download and run the the PikeOS image, perform the following steps:
• Connect the serial interface cable of the target with your development host.
• Connect an ethernet interface of the target to your network.
• Start a terminal emulation program like kermit or minicom on your development host with the proper
communication parameters. You have to switch carrier detection off.
• If you now reset the board, you should see the boot message of the PPCMon firmware.
• Hit a CTRL+C to stop the boot process.
• Configure the network parameters.
PPC_Mon6>set inet_eth1
COMMON inet_eth1: "172.21.3.214:255.255.0.0" ->192.168.2.33:255.255.255.0
Exit Status: Success
PPC_Mon6>set inet_server:
COMMON inet_server: "172.21.35.254" ->192.168.2.1
Exit Status: Success
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
36 Boot Strategies
You need to replace "192.168.2.33:255.255.255.0" by the IP address and netmask of your target, same for
the IP address of the TFTP server "192.168.2.1".
You can verify the network address configuration with:
PPC_Mon6>show inet
COMMON inet_eth0: "0.0.0.0:255.255.255.255"
COMMON inet_eth1: "172.24.13.240"
COMMON inet_eth2: "0.0.0.0:255.255.255.255"
COMMON inet_gateway: "172.24.13.1"
COMMON inet_mount: "/export/nfsroot/mfcc-8558"
COMMON inet_server: "172.24.13.2"
COMMON inet_speed_eth0 [ 10+100+1000+10G+aneg+up ]: "10+100+aneg"
COMMON inet_speed_eth1 [ 10+100+1000+10G+aneg+up ]: "10+100+1000+aneg"
COMMON inet_speed_eth2 [ 10+100+1000+10G+aneg+up ]: "10+100+aneg"
• Set up the automatic boot script.
PPC_Mon6>set boot_script "the_new_boot_script"
COMMON boot_script: "delay" ->delay (boot_delay) && tftp.b boot.img 0x30000 ...
Exit Status: Success
The the_new_boot_script for booting PikeOS needs to be:
"$(boot_delay) && tftp.b boot.img 0x30000 && cn_pw 0 0x15 _0_ 0x1800 && go 0x30000"
It needs to be enclosed with the quotation marks, if given directly to command prompt of the PPC_Mon6.
The "cn_pw 0 0x15 _0_ 0x1800" command is in the boot script to disable the PHY of the ethernet
card after downloading the boot image. If it is not disabled the ethernet card remains active and incoming
packets may via DMA corrupt the memory used by PikeOS.
The automated boot setup can be verified with show command.
PPC_Mon6>show boot
• Copy the binary image into the TFTP boot directory and name it boot.img. Make sure that
it has read permission for world. Precompiled boot images for MFCC-8558 can be found in
/opt/pikeos-4.2/target/ppc/e500mc/boot-images.
• restart the MFCC-8558 board
From PPC Mon it can be done with reset command.
PPC_Mon6>reset
• PikeOS should be automatically loaded and started.
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
5 Drivers
5.1 Serial drivers
5.1.1 Serial 8250
PikeOS provides a serial driver for use with 8250 controllers. The 8250 serial driver uses the driver development environment with the Serial Driver High Level Module (see PikeOS Device Driver Programming Reference Manual, section 9, page 412). Please refer to the PikeOS Device Driver Programming Reference Manual, section 8.5, page 409 for details about the serial class driver configuration and PikeOS Device Driver Programming Reference Manual, section 8.4, page 395 for description of the interface between driver and client. The 8250 driver is provided in two versions - user level (external file provider) and kernel level.
5.1.1.1 Driver Specific Configuration Parameters
In addition to the standard parameters defined for serial drivers by the driver framework, the 8250 serial driver has three specific configuration parameters. The access to the 8250 registers is always 8-bit. However, on some platforms the registers are not located in con- secutive bytes. Instead, there is a certain spacing between the registers. On such platforms, the "reg_multiplier" parameter can be used to select the spacing, in bytes, including the 8-bit register itself. If the "reg_multiplier" is greater than one byte and the system is big-endian, then the correct location of the 8- bit 8250 register can be selected using the "address_swap_mask" parameter, which XORs the intended register address with the mask. The addresses are assumed to be little endian.
Property pathnames are relative to the subdirectory prop:config/provider//priv/io/. The default value is used if the property is not present. If the property is present but cannot be read or is of the wrong type, this is treated as an error. Property Pathname Property Type Description Default Value address_swap_mask prop_uint32 Address swap mask remaps the address of regis- 0 ter location. The value is XORed with the actual register address. reg_multiplier prop_uint32 Register multiplier denotes the size of one 8250 1 register in bytes sampling_rate prop_uint32 Oversampling Rate, depends on particular UART 16 chip
5.1.1.2 Driver IOCTL Commands
The DRV_SER_IOCTL_SET_COMM command is used to set port communication parameters. When calling this command, the 8250 driver resets the UART and the RS232 signals to a default state.
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38 Drivers
The following signals can be set with the DRV_SER_IOCTL_SET_SIGNAL command and read back with the DRV_SER_IOCTL_GET_SIGNAL command:
• DRV_SER_SIGNAL_LOOP
• DRV_SER_SIGNAL_OUT1
• DRV_SER_SIGNAL_RTS
• DRV_SER_SIGNAL_DTR
Warning: When hardware flow control is enabled it is not possible to set RTS signal.
Note: Since on some platforms is used OUT2 signal for enabling interrupts it is not possible to set this signal.
Additionally the following signals can be read with the DRV_SER_IOCTL_GET_SIGNAL command:
• DRV_SER_SIGNAL_CTS
• DRV_SER_SIGNAL_DCD
• DRV_SER_SIGNAL_RI
• DRV_SER_SIGNAL_DSR
5.1.1.3 Driver Specific Limitations
The 8250 serial driver has the following limitations:
• The driver only supports one logical device per I/O device.
5.1.1.4 User Level Driver
The user level version of the driver is provided by the module
/opt/pikeos-D5.0/target/ppc/e500mc/driver/object/8250.elf
and the corresponding configuration file is
/opt/pikeos-D5.0/target/ppc/e500mc/driver/serial/8250.dom
The dom file adds the driver to the service partition, instantiates a single serial port, associating it with the COM1 I/O device. The port communication parameters are defaulted to 115200,8N1, no handshake. It has no dependencies. In CODEO, the 8250 driver can be added to an integration project using the Add... button. Browse to PIKEOS_POOL->driver->serial and select 8250 Serial User Level Driver. In a configuration script, the 8250 driver can be added to an integration project with the line
add PIKEOS_POOL driver/serial/8250.dom
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5.1.1.5 Kernel Level Driver
The use the kernel lever version of the 8250 driver, the following steps are needed:
• Using a kernel fusion project, create a new kernel linked with the driver
• Configure the integration project to use this new kernel
• Add the driver configuration to the integration project
5.1.1.5.1 Kernel Fusion Project
The kernel level version of the driver is provided by the module
/opt/pikeos-D5.0/target/ppc/e500mc/fusion-kernel/object/kerneldriver/8250/8250.kdev
and the corresponding configuration file is
/opt/pikeos-D5.0/target/ppc/e500mc/fusion-kernel/kerneldriver.cmp
To add the driver to a kernel fusion project using CODEO:
• Create a new PikeOS project, of type Kernel Fusion. From the list of demo projects, select the kernel
corresponding to the board used in the integration project. Please refer to the Appendix for the list of
kernels.
• Set the custom pool. The kernel fusion project should use the same pool as the integration project.
• Select the base component and click the Add... button.
• Browse to PIKEOS_POOL->fusion-kernel->kerneldriver. Click OK, Finish. Save the project.
• Execute the all and install Make targets.
The new kernel should now be installed under the object/bsp directory in the custom pool.
5.1.1.5.2 Configuring the Integration Project
The new kernel created in the fusion project and the kernel driver configuration must be added to the integration project. The kernel driver property based configuration is provided by the file
/opt/pikeos-D5.0/target/ppc/e500mc/driver/serial/8250_kdev.dom
Alternatively, it is possible to use the binary configuration file
/opt/pikeos-D5.0/target/ppc/e500mc/driver/serial/8250/8250_prov_kdev.cmp
Using CODEO:
• Open the integration project in the project editor (open the project.xml file).
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40 Drivers
• Set the custom pool. The integration project should use the same pool as the kernel fusion project.
• Select the PikeOS Kernel element inside the board component.
• In the parameter section labelled Kernel Binary, set the Kernel Directory to Custom Pool.
• Select the board component and click the Add... button.
• Browse to PIKEOS_POOL->driver->serial->8250 Serial Kernel Level Driver. Click OK, Finish.
• Configure the driver. The driver supports up to four devices. By default, the first device is enabled. Other
devices are enabled by setting the Number of devices parameter. For each device, configure the I/O settings
to match the board.
• Save the project.
• Execute the boot Make target.
5.2 Ethernet drivers
5.2.1 Ethernet dpaafp
The DPAA provides a multi-channel Ethernet server which allows usage of the on-chip dTSEC/TGEC/mEMAC devices from different applications simultaneously.
Note: The driver is obsolete and shouldn’t be used. For SoC Txxxx the dpaa driver should be used instead of dpaafp, see section 5.2.2, page 43. As the dpaa driver doesn’t support FMANv1, the driver dpaafp driver should only be used for boards with SoC Pxxxx.
Note: The driver doesn’t support multicast, see section 5.2.2, page 43 for the dpaa driver.
By default, the driver can be accessed through the following filenames:
• "eth0:0" for virtual channel 0 of physical device 0
• "eth0:1" for virtual channel 1 of physical device 0
• "eth0:2" for virtual channel 2 of physical device 0
• "eth0:3" for virtual channel 3 of physical device 0
• "eth1:0" for virtual channel 0 of physical device 1
• "eth1:1" for virtual channel 1 of physical device 1
• "eth1:2" for virtual channel 2 of physical device 1
• "eth1:3" for virtual channel 3 of physical device 1
The Ethernet driver consists of two cooperating modules:
${PIKEOS_TARGET_FILES}/driver/object/dpaa_v_config_fp ${PIKEOS_TARGET_FILES}/driver/object/dpaa_v_portal_fp
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... where the is the version of the Frame Manager.
• Version 1 supports the Pxxxx processors.
• Version 3 supports the T1040/T1042 processors.
• Version 4 supports the T4240 processors.
• Version 5 supports the T2080 processors.
A correct version of the module and a required low-level configuration parameters are chosen automatically by the BSP via the BOARD dependency. Following two components are provided as part of the DPAA network driver.
PIKEOS_POOL driver/ethernet/dpaa_fp/dpaa_config_fp.cmp PIKEOS_POOL driver/ethernet/dpaa_fp/dpaa_portal_fp.cmp
To use a DPAA network interface the config and the portal component instances are required. The config instance is used to configure the DPAA components at startup. Exactly one instance of the config component is needed. See table 7 for details.
These parameters can be configured in the dpaa_config_fp component. Default value is used if component instance does not override parameter value. Parameter Name Type Description Default Value BMan pools integer Number of the buffer manager pools. Each portal 4 needs two buffer pools. One for transmit and one for receive. BMan buffers integer Number of the buffer manager buffers 4096 FQIDs integer Number of the frame queues. 256
Table 7: DPAA components configuration for PPC e500mc
To support more than 2 Ethernet ports, you need to increase BMan pools and BMan buffers.
Note: Only one buffer pool for reception and one buffer pool for transmission is supported by the driver.
The portal module is used to send and receive Ethernet frames. Each portal serves a single Ethernet interface and it requires an instance of the portal component. The PORTAL dependency of the portal is used to select the first unused portal resource provided by the BSP. The driver will refuse to start if there is non-assigned portal resource with the smaller number. For example, to use 3 portals all of the portal0, portal1 and portal3 has to be assigned. See table 8 for details.
These parameters can be configured in the dpaa_portal_fp component. Default value is used if component instance does not override parameter value. Parameter Name Type Description Default Value Device Name string The prefix of the PikeOS provider name. eth Device Number integer The suffix of the PikeOS provider name. 0 Number of RX buffer pool integer The number of buffers used to receive frames 1024 buffers
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42 Drivers
These parameters can be configured in the dpaa_portal_fp component. Default value is used if component instance does not override parameter value. Parameter Name Type Description Default Value RX buffer size integer The size of a buffer used to receive a frame 1518 Number of TX buffer pool integer The number of buffers used to transmit frames 1024 buffers TX buffer size integer The size of a buffer used to transmit a frame 1518 Name of the port string The name of network controller. It has the pre- Port_1G_fm1_p1 scribed format ’Port_[x]G_fm[y]_p[z]. The [x] specifies the speed of the controller in Gbit/s. The [y] specifies the frame manager (1, 2). The [z] specifies the controller within the frame manager (1, ..., 5) Speed integer The speed of the interface [MBit/s], 0 means auto- 0 negotiation Maximum frame size integer The maximum Ethernet frame size 1518 Promiscuous mode boolean Disable destination MAC address filtering on the false reception. Channel 0 MAC Address mac MAC address for device channel 0. 00:E0:0C:00:D7:00 Channel 0 Bootloader MAC boolean Read MAC address set by bootloader. If the true MAC address is not set by the bootloader (00:00:00:00:00:00), the value configured for Channel 0 will be used as the fallback address. Channel 1 MAC Address mac MAC address for device channel 1 00:E0:0C:00:D7:01 Channel 2 MAC Address mac MAC address for device channel 2 00:E0:0C:00:D7:02 Channel 3 MAC Address mac MAC address for device channel 3 00:E0:0C:00:D7:03 PHY Address integer Address of PHY for the selected ethernet port. 0x100 (selected by When the PHY is not detected, you should verify board and port) that the TBI PHY address is different. TBI PHY Address integer Address of PHY for TBI. The value has only an 5 effect on Pxxxx SoCs (FMANv1). Any value be- tween 0 and 255 will work when it is different than any other PHY address. All configured portals need to have the same value configured here.
Table 8: DPAA portal configuration on PPC e500mc
Used Name of the port must be unique for each portal. The P4080, P5040 and T4240 have 2 frame managers. The others have 1 frame manager. Up to 5 portals can be configured per one frame manager. The property Speed specifies the interface speed in Mb/s. For dTSECs/mEMACs data ∈ {0, 10, 100, 1000}. For TGECs/mEMACs data ∈ {0, 10000}. 0 selects auto-negotiation, which is required for 1000BaseT and above. See table 9 for details.
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Ethernet drivers 43
Note: Make sure that the MAC addresses for these channels do not conflict with existing MAC addresses in your network. If you have two targets running PikeOS in your network, you have to change the values for one of the targets anyhow.
A recommended way to assign MAC addresses to virtual channels is to set the first three bytes of the MAC address to a reserved value, e.g. "00:01:01" and encode the three least significant bytes of the IP address which will be assigned to the client of the channel in the last three bytes, eg. if the owner of channel 1 will get the IP address 172.33.1.1 assign the MAC address "00.01:01:21:01:01".
Note: Sometimes a dTSEC is configured to be connected to a SERDES lane and to a dedicated RGMII interface (EC0, EC1). Make sure to power down the SERDES lane in the RCW, if you want to use the corresponding ECx interface.
The parameter PHY Address have to be configured in the dpaa_portal_fp component as shown in this table. Board Port Port Name PHY Address T1040RDB ETH0 Port_1G_fm1_p4 1 T1040RDB ETH1 Port_1G_fm1_p5 2 T1040RDB ETH2 Port_1G_fm1_p3 3 T1040RDB other port Port_1G_fm1_p[z] (not supported) T4240RDB ETH0 Port_1G_fm1_p1 0 T4240RDB ETH1 Port_1G_fm1_p2 1 T4240RDB ETH2 Port_1G_fm1_p3 2 T4240RDB ETH3 Port_1G_fm1_p4 3 T4240RDB ETH4 Port_1G_f2_p1 4 T4240RDB ETH5 Port_1G_f2_p2 5 T4240RDB ETH6 Port_1G_f2_p3 6 T4240RDB ETH7 Port_1G_f2_p4 7 T4240RDB other port Port_10G_fm[y]_p[z] (not supported) Other supported board Port_1G_fm[y]_p[z] (empty value) Unsupported board Port_1G_fm[y]_p[z] 0 - 255 (see board manual or schematics) Any board Port_10G_fm[y]_p[z] (not supported)
Table 9: DPAA portal file provider configuration on PPC e500mc
5.2.2 Ethernet dpaa
PikeOS provides a multi-channel Ethernet driver which allows usage of the dpaa Ethernet controller from different applications simultaneously. The dpaa Ethernet driver uses the PikeOS driver development environment with the Network Driver High Level Module. Please refer to the PikeOS Device Driver Programming Reference Manual
• section 11, page 488 for Network Driver High Level Module documentation
• section 10.5, page 486 for details about the network class driver configuration
• section 10.4, page 466 for description of the interface between driver and client
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44 Drivers
By default, the driver can be accessed through the following filenames:
• "eth0:dev0" for the physical device 0
• "eth0:0" for virtual channel 0 of the physical device 0
• "eth0:1" for virtual channel 1 of the physical device 0
• "eth0:2" for virtual channel 2 of the physical device 0
• "eth0:3" for virtual channel 3 of the physical device 0
• "eth0:dev1" for the physical device 1
• "eth0:4" for virtual channel 0 of the physical device 1
• "eth0:5" for virtual channel 1 of the physical device 1
• "eth0:6" for virtual channel 2 of the physical device 1
• "eth0:7" for virtual channel 3 of the physical device 1
The Ethernet driver is provided by the module:
/opt/pikeos-D5.0/target/ppc/e500mc/driver/object/dpaa.elf
The corresponding driver configuration files are:
• The domain file, instantiating and configuring the base driver configuration component, the physical device
component and overloading default configuration parameters when needed:
/opt/pikeos-D5.0/target/ppc/e500mc/driver/ethernet/dpaa_ext-demo.dom
• The driver component files giving the driver configuration and data structure:
/opt/pikeos-D5.0/target/ppc/e500mc/driver/ethernet/dpaa/dpaa-base.cmp
/opt/pikeos-D5.0/target/ppc/e500mc/driver/ethernet/dpaa/dpaa-device.cmp
/opt/pikeos-D5.0/target/ppc/e500mc/driver/config/hlnet/hlnet-vchan.cmp
The Ethernet driver can be added using Add... button. Select Ethernet type and select dpaa-network-driver. The driver provides a single device which can be configured.
Note: In order to restore a previously deleted driver group. It is recommended to use Restore Child... function from the BSP group context menu rather then the Add... button. The items will be restored with the BSP configuration preserved.
Warning: Note that the use of the physical device and the use of the virtual channels are exclusive. When using virtual channels, the physical device shall not be used, and vice versa.
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Ethernet drivers 45
5.2.2.1 Driver Base Configuration
These configuration parameters are the most generic configuration parameters. They allow configuration of:
• Driver Process:
Process Name: Default: dpaa
Provider Name: Default: dpaa
• Diagnostics: Allows the user to configure the BASE class diagnostics parameters (described in PikeOS Device Driver Programming Reference Manual)
• Provider Resources: Allows the user to configure the CHAR class parameters (described in PikeOS Device Driver Programming Reference Manual)
5.2.2.2 Physical Device Configuration
The device configuration is done in 3 generic steps:
• BSP Settings:
IO_ID: I/O resource used for device. This will select the interface (see board description for details).
Default:0.
• Generic Device Configuration:
Device Name: Device name used to identify the logical device in the configuration. Default:0.
File name: The file name used by client applications to access the logical device. Default: dev0
Access Mode: The access mode supported on the device. Can be: Read Only (RD_ONLY ), Write
Only (WR_ONLY ) or both (RD_WR). Default: RD_WR
Shared Device: If set to true, multiple concurrent opens on the device are supported. Default: false
Read Timeout: Timeout mode for read requests. Can be: Non-blocking, User Value or Infinite.
Default: Infinite
Read Timeout Value: If Read Timeout is set to User Value, this parameter is the PikeOS timeout
value (in nanosecond) for read requests. Default: 1000000
Write Timeout: Timeout mode for write requests. Default: Infinite
Write Timeout Value: If Write Timeout is set to User Value, this parameter is the PikeOS timeout
value (in nanosecond) for write requests. Default: 1000000
• Ethernet Device Configuration:
MBUF pool size: Number of mbufs in the pool. buffer. Default: 512
MAC Address: Channel MAC address. If set to 00:00:00:00:00:00, the high level layer of the driver
automatically retrieves the MAC address from the hardware registers. If the hardware value is still
00:00:00:00:00:00, the driver raises an error. Default: 00:00:00:00:00:00
Receive queue depth: Number of packets in the receive queue. Default: 64
Send queue depth: Number of packets in the send queue. Default: 64
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46 Drivers
Enable Multicast Communication: Enable Ethernet multicast communication for this device. Default:
false.
Multicast Table Size: Number of entries in multicast table. One entry in the table equals one multicast
MAC address. Default: 128
• Device Configuration:
Enable MPIC_EISR: Enable mapping of MPIC_EISR. This is needed on PowerPC to faster process
error interrupts. This should be enabled.
Resource Partition: The driver will allocate memory from the configured resource partition. The
resulting effect depends on the DDK implementation; i.e. there is no effect for External File Providers,
the driver will still allocate memory from the partition where it is running.
Enable CPU selection: The driver will by default bind the portals to the current CPU. This option can
be enabled to enable the configuration parameter for selecting the CPU.
cpuid: Selected CPU. Threads accessing the software portals will bind to this CPU when it is ac-
cessed the first time.
Enable additional mapping: This enables an additional mapping which is needed by the driver (e.g.
for selecting the MDIO bus for the PHYs (see board description for details).
Name of additional mapping: Name of additional mapping which will be mapped by the driver (see
board description for details).
Enable FMAN2: This enables the mapping of the second frame manager. This is disabled by default,
see board description whether this is needed.
5.2.2.3 Virtual Channel Configuration
The Virtual Channel (VC) configuration is a generic configuration repeating 3 steps of the device configuration:
• Virtual Channel: As for the Device configuration, this configuration group is used to configure properties file
name and provided file name.
• Channel Configuration: Used for configuring the VC MAC Address, the Receive/Send queues depth in
terms of packet number. Default: (00:00:00:00:00:00, 32, 32).
Warning: The VC MAC Address default value (00:00:00:00:00:00) is used by the high level layer of
the driver as a flag to automatically compute and provide the VC MAC Address, the value of the MAC
Address being accessible by ioctl.
• Multicast Communication: Used for enabling and configuring the Multicast feature of the VC. Default: (false,
32)
5.2.2.4 Driver Specific Limitations
The dpaa network driver has the following limitations:
• Only available as External File Provider Driver.
• TGEC is not supported (10GBit/s interface).
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Ethernet drivers 47
5.2.2.5 Board Specific Device Configuration
MPIC_EISR has to be enabled for all boards in the device configuration (See table 10). FMAN2 has to be enabled for T4240QDS and T4240RDB. The additional mapping for QIXIS has to be enabled for T4240QDS and T2080QDS. The P2041RDB and P4080DS boards are not supported (see section 5.2.2, page 43 for an alternative driver).
The IO ID have to be configured in the dpaa-device component as shown in this table. Board IO ID Ethernet Port T2080QDS 0 GETH, FM1@DTSEC3 T2080QDS 1 GETH, FM1@DTSEC4 T2080RDB 0 ETH4, FM1@DTSEC3 T2080RDB 1 ETH5, FM1@DTSEC4 T4240QDS 0 ENET TOP, FM1@DTSEC5 T4240QDS 1 ENET BOTTOM, FM2@DTSEC5 T4240RDB 0 ETH0, FM1@DTSEC1 T4240RDB 1 ETH1, FM1@DTSEC2 T4240RDB 2 ETH2, FM1@DTSEC3 T4240RDB 3 ETH3, FM1@DTSEC4 T4240RDB 4 ETH4, FM2@DTSEC1 T4240RDB 5 ETH5, FM2@DTSEC2 T4240RDB 6 ETH6, FM2@DTSEC3 T4240RDB 7 ETH7, FM2@DTSEC4 T1040RDB 0 ETH0, FM1@DTSEC2 T1040RDB 1 ETH1, FM1@DTSEC5 T1040RDB 2 ETH2, FM1@DTSEC3
Table 10: e500mc board specific device configuration
5.2.3 Ethernet e1000
PikeOS provides a multi-channel Ethernet driver which allows usage of the Intel e1000 family Ethernet controller from different applications simultaneously. When available, the driver gives preference to use of MSI-X or MSI over legacy interrupt signaling, with automatic fallback. The e1000 Ethernet driver uses the PikeOS driver development environment with the Network Driver High Level Module. Please refer to the PikeOS Device Driver Programming Reference Manual
• section 11, page 488 for Network Driver High Level Module documentation
• section 10.5, page 486 for details about the network class driver configuration
• section 10.4, page 466 for description of the interface between driver and client
By default, the driver can be accessed through the following filenames:
• "eth0:dev0" for the physical device
• "eth0:0" for virtual channel 0
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48 Drivers
• "eth0:1" for virtual channel 1
• "eth0:2" for virtual channel 2
• "eth0:3" for virtual channel 3
The Ethernet driver is provided by the module:
/opt/pikeos-D5.0/target/ppc/e500mc/driver/object/e1000.elf
The corresponding driver configuration files are:
• The domain file, instantiating and configuring the base driver configuration component,the physical device
componenent and 4 virtual channel components, and overloading default configuration parameters when
needed:
/opt/pikeos-D5.0/target/ppc/e500mc/driver/ethernet/e1000.dom
• The driver component files giving the driver configuration and data structure:
/opt/pikeos-D5.0/target/ppc/e500mc/driver/ethernet/e1000/e1000-fp_ext.cmp
/opt/pikeos-D5.0/target/ppc/e500mc/driver/ethernet/e1000/e1000-device.cmp
/opt/pikeos-D5.0/target/ppc/e500mc/driver/config/hlnet/hlnet-vchan.cmp
The Ethernet driver can be added using Add... button. Select Ethernet type and select e1000 Ethernet User Level Driver. The driver provides a single device and 4 virtual channels which can be independently configured.
Note: In order to restore a previously deleted driver group. It is recommended to use Restore Child... function from the BSP group context menu rather then the Add... button. The items will be restored with the BSP configuration preserved.
Warning: Note that the use of the physical device and the use of the virtual channels are exclusive. When using virtual channels, the physical device shall not be used, and vice versa.
5.2.3.1 Driver Base Configuration
These configuration parameters are the most generic configuration parameters. They allow configuration of:
• Driver Process:
Process Name: Default: e1000
Provider Name: Default: eth0
• Diagnostics: Allows the user to configure the BASE class diagnostics parameters (described in PikeOS
Device Driver Programming Reference Manual)
• Provider Resources: Allows the user to configure the CHAR class parameters (described in PikeOS Device
Driver Programming Reference Manual)
Note: The Maximum Transfer Size can be increased to support jumbo frames (view section 5.2.3.5).
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Ethernet drivers 49
5.2.3.2 Physical Device Configuration
The device configuration is done in 3 generic steps:
• Generic Device Configuration:
Device Name: Device name used to identify the logical device in the configuration. Default:0.
File name: The file name used by client applications to access the logical device. Default: dev0
Access Mode: The access mode supported on the device. Can be: Read Only (RD_ONLY ), Write
Only (WR_ONLY ) or both (RD_WR). Default: RD_WR
Shared Device: If set to true, multiple concurrent opens on the device are supported. Default: false
Read Timeout: Timeout mode for read requests. Can be: Non-blocking, User Value or Infinite.
Default: Infinite
Read Timeout Value: If Read Timeout is set to User Value, this parameter is the PikeOS timeout
value (in nanosecond) for read requests. Default: 1000000
Write Timeout: Timeout mode for write requests. Default: Infinite
Write Timeout Value: If Write Timeout is set to User Value, this parameter is the PikeOS timeout
value (in nanosecond) for write requests. Default: 1000000
• Ethernet Device Configuration:
MBUF pool size: Number of mbufs in the pool. buffer. Default: 512
MAC Address: Channel MAC address. If set to 00:00:00:00:00:00, the high level layer of the driver
automatically retrieves the MAC address from the hardware EEPROM memory. If the hardware value
is still 00:00:00:00:00:00, the driver raises an error. Default: 00:00:00:00:00:00
Receive queue depth: Number of packets in the receive queue. Default: 64
Send queue depth: Number of packets in the send queue. Default: 64
Enable Multicast Communication: Enable Ethernet multicast communication for this device. Default:
false.
Multicast Table Size: Number of entries in multicast table. One entry in the table equals one multicast
MAC address. Default: 128
5.2.3.3 BSP Configuration / PCI Device Configuration
• PCI Device Location: Selects the PCI device location. For more information about the possible ways how to express the PCI device location please refer to PikeOS User Manual, section 10.7, page 244. Default: byclass/020000/0000 (First instance of Ethernet PCI Class).
• MSI Support: Enables or disables MSI interrupt support. Default: enabled.
• MSI-X Support: Enables or disables MSI-X interrupt support. Default: enabled.
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50 Drivers
5.2.3.4 Virtual Channel Configuration
The Virtual Channel (VC) configuration is a generic configuration repeating 3 steps of the device configuration:
• Virtual Channel: As for the Device configuration, this configuration group is used to configure properties file
name and provided file name.
• Channel Configuration: Used for configuring the VC MAC Address, the Receive/Send queues depth in
terms of packet number. Default: (00:00:00:00:00:00, 32, 32).
Warning: The VC MAC Address default value (00:00:00:00:00:00) is used by the high level layer of
the driver as a flag to automatically compute and provide the VC MAC Address, the value of the MAC
Address being accessible by ioctl.
• Multicast Communication: Used for enabling and configuring the Multicast feature of the VC. Default: (false,
32)
5.2.3.5 Maximum Transfer Size Configuration
The Maximum Transfer Size can be increased to support jumbo frames. The Maximum Transmission Unit (MTU) is calculated using this value minus the Ethernet frame header and the VLAN encapsulation (18+4 bytes). The default value of Maximum Transfer Size is 1522 (1500+18+4) to support standard Ethernet frames but the driver can support an MTU of up to 8192.
Warning: The supported Maximum Transer Size depends on hardware and driver limitations. Some devices will support 8KB jumbo frames and others will be limited to 4KB or standard 1522 bytes. An health monitor event will be raised during driver initialization if the configured size is not supported for the device.
To support 8KB jumbo frames, the Maximum Transfer Size must be configured to 8192 and the Heap Memory Size must be set to 0x800000 (with the default number of 512 mbufs in the pool).
5.2.3.6 Driver Specific Limitations
The e1000 network driver has the following limitations:
• Only support one Ethernet device per driver module.
• Only available as External File Provider Driver.
• Dependency on PCI Manager
5.2.4 Ethernet Realtek RTL
PikeOS provides a multi-channel Ethernet driver which allows usage of the Realtek RTL8111x, RTL8110x and RTL8169x based Ethernet controller from different applications simultaneously. When available, the driver gives preference to use of MSI-X or MSI over legacy interrupt signaling, with automatic fallback. The rtl Ethernet driver uses the PikeOS driver development environment with the Network Driver High Level Module. Please refer to the PikeOS Device Driver Programming Reference Manual
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Ethernet drivers 51
• section 11, page 488 for Network Driver High Level Module documentation
• section 10.5, page 486 for details about the network class driver configuration
• section 10.4, page 466 for description of the interface between driver and client
By default, the driver can be accessed through the following filenames:
• "eth0:dev0" for the physical device
• "eth0:0" for virtual channel 0
• "eth0:1" for virtual channel 1
• "eth0:2" for virtual channel 2
• "eth0:3" for virtual channel 3
The Ethernet driver is provided by the module:
/opt/pikeos-D5.0/target/ppc/e500mc/driver/object/rtl.elf
The corresponding driver configuration files are:
• The domain file, instantiating and configuring the base driver configuration component,the physical device componenent and 4 virtual channel components, and overloading default configuration parameters when needed:
/opt/pikeos-D5.0/target/ppc/e500mc/driver/ethernet/rtl.dom
• The driver component files giving the driver configuration and data structure:
/opt/pikeos-D5.0/target/ppc/e500mc/driver/ethernet/rtl/rtl-fp_ext.cmp
/opt/pikeos-D5.0/target/ppc/e500mc/driver/ethernet/rtl/rtl-device.cmp
/opt/pikeos-D5.0/target/ppc/e500mc/driver/config/hlnet/hlnet-vchan.cmp
The Ethernet driver can be added using Add... button. Select Ethernet type and select RTL Ethernet User Level Driver. The driver provides a single device and 1 virtual channel. More virtual channels can be added which can be independently configured.
Note: In order to restore a previously deleted driver group. It is recommended to use Restore Child... function from the BSP group context menu rather then the Add... button. The items will be restored with the BSP configuration preserved.
Warning: Note that the use of the physical device and the use of the virtual channels are exclusive. When using virtual channels, the physical device shall not be used, and vice versa.
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52 Drivers
5.2.4.1 Driver Base Configuration
These configuration parameters are the most generic configuration parameters. They allow configuration of:
• Driver Process:
Process Name: Default: rtl
Provider Name: Default: eth0
• Diagnostics: Allows the user to configure the BASE class diagnostics parameters (described in PikeOS
Device Driver Programming Reference Manual)
• Provider Resources: Allows the user to configure the CHAR class parameters (described in PikeOS Device
Driver Programming Reference Manual)
5.2.4.2 Physical Device Configuration
The device configuration is done in 3 generic steps:
• Generic Device Configuration:
Device Name: Device name used to identify the logical device in the configuration. Default:0.
File name: The file name used by client applications to access the logical device. Default: dev0
Access Mode: The access mode supported on the device. Can be: Read Only (RD_ONLY ), Write
Only (WR_ONLY ) or both (RD_WR). Default: RD_WR
Shared Device: If set to true, multiple concurrent opens on the device are supported. Default: false
Read Timeout: Timeout mode for read requests. Can be: Non-blocking, User Value or Infinite.
Default: Infinite
Read Timeout Value: If Read Timeout is set to User Value, this parameter is the PikeOS timeout
value (in nanosecond) for read requests. Default: 1000000
Write Timeout: Timeout mode for write requests. Default: Infinite
Write Timeout Value: If Write Timeout is set to User Value, this parameter is the PikeOS timeout
value (in nanosecond) for write requests. Default: 1000000
• Ethernet Device Configuration:
MBUF pool size: Number of mbufs in the pool. buffer. Default: 512
MAC Address: Channel MAC address. If set to 00:00:00:00:00:00, the high level layer of the driver
automatically retrieves the MAC address from the hardware EEPROM memory. If the hardware value
is still 00:00:00:00:00:00, the driver raises an error. Default: 00:00:00:00:00:00
Receive queue depth: Number of packets in the receive queue. Default: 64
Send queue depth: Number of packets in the send queue. Default: 64
Enable Multicast Communication: Enable Ethernet multicast communication for this device. Default:
false.
Multicast Table Size: Number of entries in multicast table. One entry in the table equals one multicast
MAC address. Default: 128
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Ethernet drivers 53
5.2.4.3 BSP Configuration / PCI Device Configuration
• PCI Device Location: Selects the PCI device location. For more information about the possible ways how
to express the PCI device location please refer to PikeOS User Manual, section 10.7, page 244. Default:
byclass/020000/0000 (First instance of Ethernet PCI Class).
• MSI Support: Enables or disables MSI interrupt support. Default: enabled.
• MSI-X Support: Enables or disables MSI-X interrupt support. Default: enabled.
5.2.4.4 Virtual Channel Configuration
The Virtual Channel (VC) configuration is a generic configuration repeating 3 steps of the device configuration:
• Virtual Channel: As for the Device configuration, this configuration group is used to configure properties file
name and provided file name.
• Channel Configuration: Used for configuring the VC MAC Address, the Receive/Send queues depth in
terms of packet number. Default: (00:00:00:00:00:00, 32, 32).
Warning: The VC MAC Address default value (00:00:00:00:00:00) is used by the high level layer of
the driver as a flag to automatically compute and provide the VC MAC Address, the value of the MAC
Address being accessible by ioctl.
• Multicast Communication: Used for enabling and configuring the Multicast feature of the VC. Default: (false,
32)
Note: While the driver supports an arbitrary number of virtual channels, the underlying hardware supports only one physical address. If multiple virtual channels are used, the network controller is forced to run in promiscuous mode.
5.2.4.5 Driver Specific Limitations
The rtl network driver has the following limitations:
• Only support one Ethernet device per driver module.
• Only available as External File Provider Driver.
• Only supports multiple virtual channels in a promiscuous mode.
• Dependency on PCI Manager
5.2.5 Ethernet virtio-net
PikeOS provides a multi-channel Ethernet driver which allows usage of the virtio-net virtual Ethernet controller from different applications simultaneously. The virtio-net Ethernet driver uses the PikeOS driver development environment with the Network Driver High Level Module. Please refer to the PikeOS Device Driver Programming Reference Manual
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54 Drivers
• section 11, page 488 for Network Driver High Level Module documentation
• section 10.5, page 486 for details about the network class driver configuration
• section 10.4, page 466 for description of the interface between driver and client
By default, the driver can be accessed through the following filenames:
• "eth0:dev0" for the physical device
• "eth0:0" for virtual channel 0
• "eth0:1" for virtual channel 1
• "eth0:2" for virtual channel 2
• "eth0:3" for virtual channel 3
The Ethernet driver is provided by the module:
/opt/pikeos-D5.0/target/ppc/e500mc/driver/object/virtio-net.elf
The corresponding driver configuration files are:
• The domain file, instantiating and configuring the base driver configuration component,the physical device
componenent and 4 virtual channel components, and overloading default configuration parameters when
needed:
/opt/pikeos-D5.0/target/ppc/e500mc/driver/ethernet/virtio-net.dom
• The driver component files giving the driver configuration and data structure:
/opt/pikeos-D5.0/target/ppc/e500mc/driver/ethernet/virtio-net/virtio-net-fp_ext.cmp
/opt/pikeos-D5.0/target/ppc/e500mc/driver/ethernet/virtio-net/virtio-net-device.cmp
/opt/pikeos-D5.0/target/ppc/e500mc/driver/config/hlnet/hlnet-vchan.cmp
Note: This component includes a BSP Settings option node, allowing to configure BSP specific param-
eters. On ARM architectures, the configuration must be done manually by specifying the memory region
and IRQ used by the device (consult the respective BSP documentation). On other architectures, virtual
PCI is used - BSP Settings allow specifying the PCI device for the device to attach to.
The Ethernet driver can be added using Add... button. Select Ethernet type and select VirtIO Ethernet User Level Driver. The driver provides a single device and 4 virtual channels which can be independently configured.
Note: In order to restore a previously deleted driver group. It is recommended to use Restore Child... function from the BSP group context menu rather then the Add... button. The items will be restored with the BSP configuration preserved.
Warning: Note that the use of the physical device and the use of the virtual channels are exclusive. When using virtual channels, the physical device shall not be used, and vice versa.
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Ethernet drivers 55
5.2.5.1 Driver Base Configuration
These configuration parameters are the most generic configuration parameters. They allow configuration of:
• Driver Process:
Process Name: Default: virtio-net
Provider Name: Default: eth0
• Diagnostics: Allows the user to configure the BASE diagnostics parameters (described in PikeOS Device Driver Programming Reference Manual)
• Provider Resources: Allows the user to configure the CHAR class parameters (described in PikeOS Device Driver Programming Reference Manual)
Note: The Maximum Transfer Size can be increased to support jumbo frames (view section 5.2.5.4).
5.2.5.2 Physical Device Configuration
The device configuration is done in 3 generic steps:
• Generic Device Configuration:
Device Name: Device name used to identify the logical device in the configuration. Default:0.
File name: The file name used by client applications to access the logical device. Default: dev0
Access Mode: The access mode supported on the device. Can be: Read Only (RD_ONLY ), Write
Only (WR_ONLY ) or both (RD_WR). Default: RD_WR
Shared Device: If set to true, multiple concurrent opens on the device are supported. Default: false
Read Timeout: Timeout mode for read requests. Can be: Non-blockig, User Value or Infinite. Default:
Infinite
Read Timeout Value: If Read Timeout is set to User Value, this parameter is the PikeOS timeout
value (in nanosecond) for read requests. Default: 1000000
Write Timeout: Timeout mode for write requests. Default: Infinite
Write Timeout Value: If Write Timeout is set to User Value, this parameter is the PikeOS timeout
value (in nanosecond) for write requests. Default: 1000000
• Ethernet Device Configuration:
MBUF pool size: Number of mbufs in the pool. buffer. Default: 512
MAC Address: Channel MAC address. If set to 00:00:00:00:00:00, the high level layer of the
driver automatically retrieves the MAC address from qemu defaults. If the hardware value is still
00:00:00:00:00:00, the driver raises an error. Default: 00:00:00:00:00:00
Receive queue depth: Number of packets in the receive queue. Default: 64
Send queue depth: Number of packets in the send queue. Default: 64
Enable Multicast Communication: Enable Ethernet multicast communication for this device. Default:
false.
Multicast Table Size: Number of entries in multicast table. One entry in the table equals one multicast
MAC address. Default: 128
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56 Drivers
5.2.5.3 Virtual Channel Configuration
The Virtual Channel (VC) configuration is a generic configuration repeating 3 steps of the device configuration:
• Virtual Channel: As for the Device configuration, this configuration group is used to configure properties file
name and provided file name.
• Channel Configuration: Used for configuring the VC MAC Address, the Receive/Send queues depth in
terms of packet number. Default: (00:00:00:00:00:00, 32, 32).
Warning: The VC MAC Address default value (00:00:00:00:00:00) is used by the high level layer of
the driver as a flag to automatically compute and provide the VC MAC Address, the value of the MAC
Address being accessible by ioctl.
• Multicast Communication: Used for enabling and configuring the Multicast feature of the VC. Default: (false,
32)
5.2.5.4 Maximum Transfer Size Configuration
The value of Maximum Transfer Size supported by the driver is 1522. The driver doesn’t support fragmented frames.
5.2.5.5 Driver Specific Limitations
The virtio-net network driver has the following limitations:
• Only support one Ethernet device per driver module.
• Only available as External File Provider Driver.
• Dependency on PCI Manager on non-ARM boards.
5.3 Block Device and MTD drivers
Drivers for Block Devices or Memory Technology Devices (MTD).
5.3.1 Block Device and MTD Simulator blkdrvsim
PikeOS provides a driver for emulating BLK devices in RAM. It can be configured to emulate block devices, such as HDD or SDD, or Memory Technology Devices such as NOR and NAND. Arbitrary device size and block size can be configured for emulated block device. Arbitrary device size, size of erase block, page size and size of out-of-band area can be configured for emulated NOR and NAND devices. Driver also provides bad block API for these devices. ECC is not emulated. The blkdrvsim BLK driver uses the driver development environment with the BLK Driver High Level Module (see PikeOS Device Driver Programming Reference Manual, section 17, page 687). Please refer to the PikeOS Device Driver Programming Reference Manual, section 16.4, page 665 for description of the interface between driver and client. The blkdrvsim driver is provided in two variants - user level (external file provider), and kernel level.
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Block Device and MTD drivers 57
5.3.1.1 Driver Specific Configuration Parameters
5.3.1.1.1 blkdrvsim Base Component
The driver can be executed in multiple instances. Each instance can provide BLK devices on configured Provider Prefix. This prefix is set by default to blk0 in a base component of driver. The base component file defines blkdrvsim BLK driver instance. In addition to the standard parameters defined for BLK drivers by the driver framework, the blkdrvsim BLK driver has additional configuration parameters.
Following parameters can be configured in the blkdrvsim_-base component. Default value is used if component instance does not override parameter value. Parameter Name Type Description Default Value PROVIDER string Device Prefix of provider blk0 MAX_FD_COUNT integer A count of the PikeOS file descriptors provided by 4 this driver. One descriptor is required for every client connected to some device or some partition. MAX_TRANSFER_- integer The maximum transfer size is the number of bytes 8192 SIZE that can be transferred in a single read or write operation.
5.3.1.1.2 blkdrvsim Device Component
Multiple emulated devices can be attached to user level blkdrvsim driver. For the kernel level driver only single device is supported and it can be configured in the base component.
Following parameters can be configured in blkdrvsim_ext-device and blkdrvsim_kdev-base components. Default value is used if component instance does not override parameter value. Property Pathname Property Type Description Default Value DEVICE_TYPE option Emulated Device Type (block, nand, nor) block TOTAL_SIZE integer Device Size in bytes; data area only 4194304 BLOCK_SIZE integer (block only) Block Size in bytes 512 ERASE_SIZE integer (nand and nor only) Erase Size in bytes 131072 PAGE_SIZE integer (nand and nor only) Page Size in bytes 512 OOB_SIZE integer (nand only) Out-of-Band Page Area Size in bytes 16 MAX_PAGES integer Maximum Pages Transfered in single operation 1 Following parameters can be configured in blkdrvsim_ext-device component only. Default value is used if component instance does not override parameter value. The PikeOS path for device will have the form PROVIDER:FILE_NAME, for example a blk0:0. Each BLK device can be opened by single client only. FILE_NAME string The file name used by client applications to ac- 0 cess the logical device. MEM_SOURCE option Source of device memory (shm or pool) pool SHM_SIZE integer Size of SHM requirement in bytes; it has to be 4329472 aligned to page size and it shall include the OOB area if configured and 4 bytes for each erase block KEEP_SHM boolean Do not clean SHM content on start; can be used false for pre-loading SHM with filesystem data
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58 Drivers
Following parameters can be configured in blkdrvsim_ext-device and blkdrvsim_kdev-base components. Default value is used if component instance does not override parameter value. Property Pathname Property Type Description Default Value Following parameters can be configured in the blkdrvsim_kdev-base component only. Default value is used if component instance does not override parameter value. The PikeOS path for device will have the form PROVIDER:DEV0_FILE_NAME, for example a blk0:0. Each device can be opened up to the MAX_CLIENT_COUNT clients. DEV0_FILE_NAME string The file name used by client applications to ac- 0 cess the logical device. MAX_CLIENT_COUNT integer Maximum number of concurrently connected 1 clients to device.
5.3.1.2 Driver Specific Limitations
The blkdrvsim BLK driver has the following limitations:
• User level driver does not support multiple connected clients on single device due to the limitation in the
BLK High Level Module.
• Kernel level driver component does not support defining multiple devices within single instance. Multiple
instances with different Provider Prefix can be used instead.
5.3.1.3 Usage of the User Level Driver
This paragraph explains integration of the user level variant of the blkdrvsim driver. The user level driver runs are regular PikeOS process with the adjustable process priority and CPU affinity. These can be adjusted in the VMIT. Number of executed driver threads depends on the settings of the THREAD_MODEL property.
5.3.1.3.1 Integration Project for the User Level Driver
The user level driver configuration must be added to the integration project. The user level version of the driver is provided by the module
/opt/pikeos-D5.0/target/ppc/e500mc/driver/object/blkdrvsim.elf
and the corresponding configuration files are
/opt/pikeos-D5.0/target/ppc/e500mc/driver/blk/blkdrvsim/blkdrvsim_ext-base.cmp /opt/pikeos-D5.0/target/ppc/e500mc/driver/blk/blkdrvsim/blkdrvsim_ext-device.cmp
Using CODEO:
• Open the integration project in the project editor (open the project.xml file).
• Select any Group component and click the Add... button.
• Browse to PIKEOS_POOL->driver->blk->blkdrvsim->blkdrvsim_ext-base. Click OK, Finish.
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Block Device and MTD drivers 59
• Browse to PIKEOS_POOL->driver->blk->blkdrvsim->blkdrvsim_ext-device. Click OK, Finish. Repeat multi-
ple times for multiple devices.
• Assign PROVIDER dependency of created devices to the associated base component of driver.
• Configure parameters of created components.
A pre-configured integration snippet demonstration can be found in
/opt/pikeos-D5.0/target/ppc/e500mc/driver/blk/blkdrvsim_ext-demo.dom
The dom file adds the driver to the service partition, instantiates the blkdrvsim driver with prefix blk0 and adds BLK device blk0:0. In CODEO, the blkdrvsim driver can be added to an integration project using the Add... button. Browse to PIKEOS_POOL->driver->blk and select blkdrvsim Block User Level Driver.
5.3.1.4 Usage of the Kernel Level Driver
This paragraph explains integration of the kernel level variant of the blkdrvsim driver. It runs in the kernel space at the same priority and the task switching time is the shortest of all other driver variants. The use the kernel level version of the blkdrvsim driver, the following steps are needed:
• Using a kernel fusion project, create a new kernel linked with the driver.
• Configure the integration project to use this new kernel.
• Add the driver configuration to the integration project.
5.3.1.4.1 Fusion Project for the Kernel Level Driver
The kernel level version of the driver is provided by the module
/opt/pikeos-D5.0/target/ppc/e500mc/fusion-kernel/object/kerneldriver/blkdrvsim.kdev
and the corresponding configuration file is
/opt/pikeos-D5.0/target/ppc/e500mc/fusion-kernel/kerneldriver.cmp
To add the driver to a kernel fusion project using CODEO:
• Create a new PikeOS project, of type Kernel Fusion. From the list of demo projects, select the kernel
corresponding to the board used in the integration project.
• Set the custom pool. The kernel fusion project should use the same pool as the integration project.
• Select a Group element and click the Add... button.
• Browse to PIKEOS_POOL->fusion-kernel->kerneldriver. Click OK, Finish. Save the project.
• Execute the all and install Make targets.
The new kernel is now installed under the object/bsp directory in the custom pool.
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60 Drivers
5.3.1.4.2 Integration Project for the Kernel Level Driver
The new kernel created in the fusion project and the kernel driver configuration must be added to the integration project. The kernel driver configuration is provided by the file
/opt/pikeos-D5.0/target/ppc/e500mc/driver/blk/blkdrvsim/blkdrvsim_kdev-base.cmp
Using CODEO:
• Open the integration project in the project editor (open the project.xml file).
• Set the custom pool. The integration project should use the same pool as the kernel fusion project.
• Select the PikeOS Kernel element inside the board component.
• In the parameter section labelled Kernel Binary, set the Kernel Directory parameter to Custom Pool.
• Select the board component and click the Add... button.
• Browse to PIKEOS_POOL->driver->blk->blkdrvsim->blkdrvsim_kdev-base. Click OK, Finish.
• Configure parameters of created components.
5.3.1.5 Demonstration Projects
Following demo project can be used for the querying (and testing) of the simulated devices:
/opt/pikeos-D5.0/demo/pikeos-native/blk-client/
These demonstration projects are using the blkdrvsim driver:
/opt/pikeos-D5.0/integration/blk-sim/project.xml /opt/pikeos-D5.0/integration/volume-provider-pikeos-native/project.xml /opt/pikeos-D5.0/integration/volume-provider-posix/project.xml /opt/pikeos-D5.0/integration/volume-provider-apex/project.xml /opt/pikeos-D5.0/integration/volume-provider-cfs-apex/project.xml /opt/pikeos-D5.0/integration/volume-provider-cfs-pikeos-native/project.xml /opt/pikeos-D5.0/integration/volume-provider-cfs-posix/project.xml /opt/pikeos-D5.0/integration/libhttpd-posix/project.xml /opt/pikeos-D5.0/integration/libmicrohttpd-posix/project.xml
5.3.1.6 Driver Source Code
A full source code of this driver is available in the DDK demos:
/opt/pikeos-D5.0/demo/ddk-user-level/hlblk-driver/ /opt/pikeos-D5.0/demo/ddk-kerneldriver/hlblk-driver/
c Copyright 2005 – 2019 SYSGO GmbH, all rights reserved.
Block Device and MTD drivers 61
5.3.2 AHCI Block Device Driver
The driver described in this chapter is available only on demand. Please contact sales@sysgo.com for further details. PikeOS provides an access to Serial ATA (SATA) storage devices connected to the Advanced Host Controller Interface (AHCI) compatible adapter via AHCI BLK driver. The AHCI BLK driver uses the driver development environment with the BLK Driver High Level Module (see PikeOS Device Driver Programming Reference Manual, section 17, page 687). Please refer to the PikeOS Device Driver Programming Reference Manual, section 16.4, page 665 for description of the interface between driver and client. The AHCI driver is provided as user level driver (external file provider).
5.3.2.1 Driver Specific Configuration Parameters
5.3.2.1.1 AHCI Base Component
The driver can be executed in multiple instances. Each instance serves single AHCI controller and provides BLK devices on configured prefix. This prefix is set to default value blk0 in the driver component. The base component file defines AHCI BLK driver for single AHCI controller. In addition to the standard parameters defined for BLK drivers by the driver framework, the AHCI BLK driver has additional configuration parameters.
These parameters can be configured in the ahci_ext-base component. Default value is used if component instance does not override parameter value. Parameter Name Type Description Default Value PROVIDER string Device Prefix of provider blk0 PCI_LOC string PCI Device Location (see PikeOS User Manual, byclass/ section 10.7.3, page 245) 010601/0000 MAX_FD_COUNT integer A count of the PikeOS file descriptors provided by 4 this driver. One descriptor is required for every client connected to some device or some partition. MAX_FILE_COUNT integer A count of device partitions that can be loaded by 2 the driver if LOAD_ALL_PARTITIONS is enabled. MAX_TRANS- integer The maximum transfer size is the number of bytes 8192 FER_SIZE that can be transferred in a single read or write operation. DIAG_VERBOSITY quiet, normal, The verbosity level determines which diagnostic normal verbose message will be displayed. DIAG_CONFIG boolean Display diagnostic messages for configuration and false initialization phase. In the verbose mode it also reports device’s information from ATAID and the layout of detected partition table. DIAG_IO boolean Display run-time reporting of the I/O errors and false port resets in the verbose mode. DIAG_TRACE boolean Display reporting executed ATA commands. In the false verbose mode it reports also error interrupts.
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62 Drivers
5.3.2.1.2 AHCI Device Component
Multiple devices on different AHCI ports can be attached to AHCI driver. The driver does not probe AHCI bus, devices configured in the integration project are probed only. Each device allows configuring following properties:
These parameters can be configured in the ahci_ext-device component. Default value is used if component instance does not override parameter value. Property Pathname Property Type Description Default Value PORT_NUM integer AHCI Port Number 0 OPERATION_MODE Buffered, Direct Access mode from AHCI controller and driver to Buffered or Mixed user I/O buffers. More info bellow. IO_BUFFER_SIZE integer Size of request I/O buffer used for Buffered and 8192 Mixed operation mode. It limits the maximum size of transaction. The amount of allocated memory will depend on the number of configured concur- rently executed requests; one buffer is needed for each request. MAX_REQUESTS integer Maximum number of concurrently executed re- 1 quests on the device. DETECT_TIMEOUT integer Timeout for a detection of the device (ms) 5000 IO_TIMEOUT integer Timeout for I/O operations (ms). Started operation 5000 that exceeds this timeout will be reported as I/O error. SPEED_ALLOWED integer Specifies the highest allowable speed of the inter- 0 face. More info bellow. FILE_NAME string The file name used by client applications to ac- 0 cess the logical device. MANDATORY boolean The flag that forces the AHCI driver to raise Health false Monitor Event if the device has not been found. AUTO_SYNC boolean The flag that forces flushing all device buffers after true each write operation on the device. PTABLE_TYPE none or DOS This option selects a partition table type on the none device. If the table type is specified, the driver tries to load partition table before the BLK devices for partitions are configured. LOAD_ALL_PARTI- boolean Provide BLK devices for all valid partitions found false TIONS in the partition table.
The PikeOS path of configured BLK device for AHCI device will have the form PROVIDER:FILE_NAME, for example a blk0:0 for a device on AHCI port 0. Each BLK device can be opened by single client only.
5.3.2.1.3 Operation Mode
• Buffered: The driver uses an internal buffer for the DMA transfers. This mode causes an overhead for
copying data from/to the user buffers.
• Direct: The driver uses the buffer provided by the user for DMA transfers. It has to be aligned to
P4_ARCH_ALIGN otherwise operation fails with P4_E_ALIGN error.
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Block Device and MTD drivers 63
• Mixed: In this mode the driver handles aligned user buffers in the Direct Mode and it handles unaligned
user buffers in the Buffered Mode.
5.3.2.1.4 Speed Allowed
• 0: No speed negotiation restrictions
• 1: Generation 1 (1.5 Gbps)
• 2: Generation 2 (3 Gbps)
• 3: Generation 3 (6 Gbps)
Notice: The negotiated speed may be lower depending on the HBA and SATA device capabilities.
5.3.2.1.5 BLK Devices for disk drive partitions
The AHCI driver can provide access to disk drive partitions defined in the DOS Partition Table via translation from a BLK Device of partition to its area on the disk device. The Partition Table loading can be enabled on device via PTABLE_TYPE. If the Partition Table type is specified, the driver tries to load it before the BLK devices for partitions are configured. The PikeOS path of configured BLK device for partition on AHCI device will have the form PROVIDER:FILE_NAME:PARTITION, for example the a blk0:2:1 for the first partition on a device on AHCI port 2. The partition number will match the index in the DOS Partition Table, so the first partition will have number 1 and the last one will have number 8. Up to 7 partitions per device are supported. Each BLK device of partition can be opened by single client only. Concurrent read/write access to partitions and underlying device is allowed, however the result of operation will depend on execution order of these operations. If the Partition Table loading is enabled the driver can create BLK devices for all valid partitions found in the partition table (see LOAD_ALL_PARTITIONS and MAX_FILE_COUNT options). Alternatively the driver can be configured to create BLK devices for statically defined partitions via Device Partition Component. Concurrent usage of the LOAD_ALL_PARTITIONS option and static partition definition is not supported and all partition components binded to such device shall be removed. Notice: A partition table for a device can be created using mkblkimage tool, see 5.3.4.
5.3.2.1.6 AHCI Device Partition Component
This component allows defining BLK device for disk drive partition statically.
These parameters can be configured in the ahci_ext-device-partition component. Default value is used if component instance does not override parameter value. Property Pathname Property Type Description Default Value PARTITION integer Partition Number (1-8) 1 MANDATORY boolean The flag that forces the AHCI driver to raise Health false Monitor Event if the partition has not been found.
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64 Drivers
5.3.2.2 User Level Driver
The user level version of the driver is provided by the module:
/opt/pikeos-D5.0/target/ppc/e500mc/driver/object/ahci.elf
and the corresponding configuration files are:
/opt/pikeos-D5.0/target/ppc/e500mc/driver/blk/ahci/ahci_ext-base.cmp /opt/pikeos-D5.0/target/ppc/e500mc/driver/blk/ahci/ahci_ext-device.cmp /opt/pikeos-D5.0/target/ppc/e500mc/driver/blk/ahci/ahci_ext-device-partition.cmp
Using CODEO:
• Open the integration project in the project editor (open the project.xml file).
• Select service partition component and click on the Add... button.
• Browse to PIKEOS_POOL -> driver -> blk -> ahci -> ahci_ext-base. And add the Base Component by
clicking on the OK, Finish button.
• For all connected AHCI devices use the Add... button and browse to PIKEOS_POOL -> driver -> blk -> ahci
-> ahci_ext-device. Then click on the OK, Finish.
• In the PikeOS Dependencies View assign the PROVIDER dependency of created devices to the Base
Component of the driver.
• If statically defined partitions will be used, then for each partition click on the Add... button and browse to
the PIKEOS_POOL -> driver -> blk -> ahci -> ahci_ext-device-partition. Then click on the OK, Finish to add
at least one Partition Component into the project.
• In the PikeOS Dependencies View assign DEVICE dependency of created partition devices to components
of their devices.
• Configure parameters of created components.
The driver also provides a pre-configured integration domain file for a fast demonstration:
/opt/pikeos-D5.0/target/ppc/e500mc/driver/blk/ahci_ext-blk-driver.dom
To try this in CODEO open an integration project, select service partition component, click on the Add... button, then browse to PIKEOS_POOL -> driver -> blk -> AHCI Block User Level Driver and confirm by clicking on the OK, Finish. This configuration domain file file adds the driver to the service partition, instantiates an AHCI driver named ’blk0’ on PCI device pci:byclass/010601/0000 with 100ms I/O timeout. It adds BLK device ’blk0:0’ on the AHCI port number 0 with DOS partition table and configures two non-mandatory statically defined partitions on ’blk0:0:1’ and ’blk0:0:2’.
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Block Device and MTD drivers 65
5.3.2.3 Error Handling
During the initialization, the driver performs detection and identification of configured devices. If a device is not available during the initialization, it will not be accessible during the run-time. If the read or write operation finishes with fatal error, or if IO_TIMEOUT is exceeded, or if a disconnection of the device is detected then the operation will return P4_E_IO error. The driver will try to re-initialize the device on the following read/write operation if there was fatal error or disconnection, and only if it suceeds the new operation is executed. The operation in such case will take longer time than in the normal case. If the re-initialization fails, the operation will return P4_E_BUSY error. Notice: The P4_E_BUSY error can be also returned if the device is accessed by more clients than is configured by the value MAX_REQUESTS. And also if multiple operations end with timeout and all available requests stays blocked.
5.3.2.4 AHCI Emulation in the QEMU
The QEMU is capable to emulate an AHCI controller and multiple disk drives connected to it. To enable QEMU’s AHCI support emulation, open the integration project, locate a AHCI Device Component and enable the device emulation by switching the Enable checkbox on (parameter EMULATE), then in the Drive Image File (parameter DRIVE_IMAGE) parameter select a image file and configure the Physical Block Size of emulated device (parameter BLOCK_SIZE). The QEMU’s boot strategy script will execute QEMU with required arguments. There is preconfigured demo image for AHCI Device located in the "PIKEOS/share/mkblkimage/blkdemo.image". This image if it is configured, will be copied into integration project directory upon the first boot. See the README in the mkblkimage demo directory for details about this image.
5.3.2.5 Multiple AHCI Controllers
If multiple AHCI Controllers are present in the system, then a separate device driver can be configured for each of them. Start by adding a new ahci_ext-base component into the Integration Project and change its component name and the values of following properties to unique values: PROCESS, PROVIDER, PCI_LOC. If the QEMU Emulation is used then change also the QEMU_ID.
5.3.2.6 Demonstration Projects
Following demo project can be used for the querying (and testing) of the AHCI devices:
/opt/pikeos-D5.0/demo/pikeos-native/blk-client/
5.3.3 Block uSDHC Driver
5.3.4 Partitioned Image Creation Tool mkblkimage
mkblkimage is a tool that helps with preparation of a partitioned disk drive or a partitioned disk image file for usage with PikeOS BLK drivers.
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66 Drivers
It can generates partition table data and shell script for initializing a disk drive or a file image. The layout of the disk drive image is defined in the configuration file by number of partitions, partition indexes, partition sizes, partition type and optionally with partition content data file. The partition sizes are specified in the units of sector size and they can be aligned to the larger physical sector boundaries via the size align parameter. The mkblkimage tool generates DOS partition table data by following rules:
• Partitions will be created and allocated in the following order: (1) 1st primary, (2) 2nd primary, (3) 3rd
primary, (4) 4th primary, (5) 1st logical, (6) 2nd logical, (7) 3rd logical, (8) 4th logical.
• The partition entry will be stored into the partition table on the index specified in the parenthesis above. For
example, the 2nd logical partition will have index 6.
• A partition will be not be generated if it has zero size.
• The first partition with non-zero size will start on the first aligned sector after the partition table.
• Further processed partitions with non-zero size will start on the aligned sector right after the end of the
previous partition.
• If logical partitions are created then 4th primary partition must not be used and it should have set size to 0.
On execution without arguments the mkblkimage tool prints brief help:
$ /opt/pikeos-D5.0/bin/mkblkimage --help Usage: mkblkimage CONFIG_FILE OUTPUT_PREFIX A new configuration file will be created if CONFIG_FILE is not existing file. Check the Platform Manual,chapter Partitioned Image Creation Tool mkblkimage for a detailed documentation.
An empty configuration file will be generated if the file specified as the first argument does not exist:
$ /opt/pikeos-D5.0/bin/mkblkimage test.conf Notice: new configuration file test.conf has been created $ cat test.conf #MKBLKIMAGE_CONFIG_BEGIN#
Notice:
This file is interpreted by bash,you can use arithmetic evaluation.
Example: SIZE_PART1_SEC=$(((64<<20)/$SIZE_SEC)) will be evaluated as 64MiB.
type of partition table
TYPE=dos
size of one sector in bytes
SIZE_SEC=512
partition alignment size in bytes
SIZE_ALIGN=4096
1st primary partition
size of partition in sectors
SIZE_PART1_SEC=0
partition type (use ćf́or FAT,otherwise keep empty)
TYPE_PART1=
path to partition image file; used for image initialization via script
IMAGE_PART1=
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Block Device and MTD drivers 67
2nd primary partition
SIZE_PART2_SEC=0 TYPE_PART2= IMAGE_PART2=
3rd primary partition
SIZE_PART3_SEC=0 TYPE_PART3= IMAGE_PART3=
4th primary partition
size of 4th partition in sectors (set to 0 if using logical partitions)
SIZE_PART4_SEC=0 TYPE_PART4= IMAGE_PART4=
1st logical partition
SIZE_LOGPART1_SEC=0 TYPE_LOGPART1= IMAGE_LOGPART1=
2nd logical partition
SIZE_LOGPART2_SEC=0 TYPE_LOGPART2= IMAGE_LOGPART2=
3rd logical partition
SIZE_LOGPART3_SEC=0 TYPE_LOGPART3= IMAGE_LOGPART3=
4th logical partition
SIZE_LOGPART4_SEC=0 TYPE_LOGPART4= IMAGE_LOGPART4= #MKBLKIMAGE_CONFIG_END#
Executing the mkblkimage tool with valid configuration file results in generation of partition table data, script and information file:
$ /opt/pikeos-D5.0/bin/mkblkimage
/opt/pikeos-D5.0/share/mkblkimage/blkdemoimage_fat.conf demoimage
Completed. Output is stored into demoimage_ptable* files.
$ ls
demoimage_ptable_0x00000000.bin demoimage_ptable.create.sh demoimage_ptable.info
The ptable.create.sh script can be used for generating partitioned disk image or device:
$ ./demoimage_ptable.create.sh demo.image $ /sbin/fdisk demo.image Command (m for help): p Disk demo.image: 64 MiB, 67112960 bytes, 131080 sectors Units: sectors of 1 * 512 = 512 bytes Sector size (logical/physical): 512 bytes / 512 bytes I/O size (minimum/optimal): 512 bytes / 512 bytes Disklabel type: dos Disk identifier: 0x00000000
Device Boot Start End Sectors Size Id Type demo.image1 8 65543 65536 32M c W95 FAT32 (LBA) demo.image2 65544 131079 65536 32M c W95 FAT32 (LBA)
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68 Drivers
5.4 PCI Controller Drivers
5.4.1 PSP PCI
The PSP PCI is a PSP level driver providing the low level functionality for the PCI and MSI drivers. This driver provides functions like reading and writing PCI configuration or device enumeration that is common for all PCI drivers. If there is a PCI bus on the platform this driver is an integral part of the PSP and is always compiled in, even if the PCI manager is not provided.
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6 The PikeOS CDK
The PikeOS CDK will be installed into the directory
/opt/pikeos-D5.0/cdk/ppc/e500mc/bin
To avoid conflicts with other utilities installed on the host, all binaries provided by the CDK are prefixed with ppc_e500mc- like ppc_e500mc-gcc. The PikeOS PowerPC cross development toolchain supports the System V ABI. This is important if routines compiled with the C-compiler shall be called from an assembly language function or vice versa. Detailed PDF documentation can be found in:
/opt/pikeos-D5.0/documentation/cdk/ppc_e500mc
6.1 Target binaries
With the installation of the PikeOS Package: Base, all the processor family dependent binary modules, libraries, header files, BSPs and PSPs will be installed into the directory
/opt/pikeos-D5.0/target/ppc/e500mc/
The PikeOS architecture name is ppc_e500mc.
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A Architecture Dependencies
A.1 Supported Architectures
The PPC/e500mc ASP supports PowerPC e500mc, e5500 and e6500 cores.
A.1.1 ASP Variants
This ASP does not provide any variants.
A.2 Address Layout
The user accessible part of the address space covers the address range from address 0 to 0x7fffffff, inclusive. The page size is 4096 bytes. The physical address space covers the first 64 GB.
A.3 Basic Data Types
PikeOS Type Size in Bytes Description P4_cpureg_t 4 Size of a processor register P4_address_t 4 Virtual memory address P4_size_t 4 Size of objects in virtual memory P4_phys_addr_t 8 Physical address space type P4_cpumask_t 4 Up to 32 processors are supported in the API
Table 16: PPC e500mc basic dta types
A.4 User Mode Context
The user mode context contains all registers necessary to save the state of a thread on a thread switch or an exception.
A.4.1 Register Set
The order of the registers is defined in the following structure. The size of a complete user mode context is 432 bytes.
P4_cpureg_t regs[32]; /* General purpose registers */
P4_cpureg_t cr; /* Condition register */
P4_cpureg_t xer; /* XER */
P4_cpureg_t lr; /* Link register */
P4_cpureg_t ctr; /* Count register */
P4_cpureg_t dar; /* Data exception address register (DEAR), see note 1 */
P4_cpureg_t ex_code; /* Exception status/reply code, see note 2 */
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Mapping Translations 71
P4_cpureg_t dsisr; /* Exception syndrome register (ESR) */
P4_cpureg_t srr0; /* Saved program counter */
P4_cpureg_t srr1; /* Saved machine state, see note 3 */
P4_cpureg_t usprg0; /* USPRG0/VRSAVE register, see note 4 */
P4_uint64_t fpregs[32]; /* Floating-point registers (64 bit) */
P4_cpureg_t _unused; /* unused */
P4_cpureg_t fpscr; /* Floating-point status and condition register */
• Note 1: Register dar, reflects the state of the DEAR register and is used to set the hotspot address in a short exception message answer. In case of an Instruction Storage Interrupt, dar has a copy of the program counter to simplify pagefault handling.
• Note 2: ex_code is not a CPU register. It contains the exception message status code and must be set to a valid reply code by the exception handler.
• Note 3: Not all bit combinations are allowed in this register. The user is only allowed to change FE1 (bit 8), DE (bit 9), FE0 (bit 11), and FP (bit 13). The floating point exception bits FE0 and FE1 should only be set if the FP bit is set as well (FPU enabled). Bit DE enables single stepping execution. Single stepping may not work when a hardware debugger is connected.
• Note 4: Register usprg0 refers to the USPRG0/VRSAVE register. usprg0 is used as thread local storage pointer. In earlier versions of PikeOS, this position was used by exnr, which encoded the architectural exception vector number.
A.4.2 Short Context
The short context is used in the short exception message and defines only a subset of all registers. Registers ex_code and dar contain the exception status code and fault address, srr0 and regs[1] represent program counter and stack pointer, and srr1 and lr are used as architecture specific registers 1 and 2.
A.4.3 FPU Support
The FPU on PowerPC processors is controlled via the FP flag (bit 13) in the MSR srr1. If the bit is set, FPU registers FPR0 to FPR31 and FPSCR are accessible in user space and saved and restored upon thread switches and exception handling.
A.4.4 TLS Support
PikeOS uses register USPRG0 as thread local storage pointer.
A.5 Mapping Translations
A.5.1 Translation of PikeOS Access Permissions to Architecture Specific Access Permissions
The mapping attributes P4_M_READ, P4_M_WRITE, and P4_M_EXEC on the left of table 17 are translated to the following effective architecture specific attributes on the right.
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72 Architecture Dependencies
P4_M_READ P4_M_WRITE P4_M_EXEC Read Write Execute 0 0 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 0 1 1 1 1 1 1 0 0 1 0 0 1 0 1 1 0 1 1 1 0 1 1 0 1 1 1 1 1 1
Table 17: PikeOS access permissions mapped to PPC e500mc specific access permissions
Execution permissions are supported on a per-page level, but this implies P4_M_READ for these page as well. Furthermore, P4_M_WRITE always implies P4_M_READ, because there is no concept of write only pages.
A.5.2 Translation of Architecture Specific Access Permissions to PikeOS Access Permissions
The architecture specific mapping attributes stored in the page tables in the kernel (on the left 18) are translated to the following generic attributes (on the right of the table).
Read Write Execute P4_M_READ P4_M_WRITE P4_M_EXEC 0 0 0 0 0 0 1 0 0 1 0 0 1 0 1 1 0 1 1 1 0 1 1 0 1 1 1 1 1 1
Table 18: PPC e500mc access permissions mapped to PikeOS specific access permissions
The five supported combinations are:
• 0: no access at all,
• P4_M_READ : read only,
• P4_M_READ | P4_M_EXEC: read only and executable,
• P4_M_READ | P4_M_WRITE : read and write, and
• P4_M_READ | P4_M_WRITE | P4_M_EXEC: read, write and executable.
A.5.3 Supported Caching Attributes
The four PikeOS caching attributes P4_M_C_ENABLE, P4_M_C_WRITEBACK, P4_M_C_PREFETCH and P4_M_C_COHERENCY are translated to a PowerPC specific WIMG value. The attributes P4_M_C_PLATFORM1 and P4_M_C_PLATFORM2 are not supported and ignored. The W and I bits are modified by P4_M_C_ENABLE and P4_M_C_WRITEBACK attributes are listed in table 19.
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Translation of Architecture Specific Exceptions to PikeOS Trap Codes 73
P4_M_C_ P4_M_C_ WI Description ENABLE WRITEBACK 0 x 01 Caching disabled 1 0 10 Caching enabled, cache strategy is write-through 1 1 00 Caching enabled, cache strategy is write-back
Table 19: PPC e500mc cachig attributes
The M bit is set the same as P4_M_C_COHERENCY which table 20 shows.
P4_M_C_ M Description COHERENCY 0 0 Memory coherency is not enforced 1 1 Memory coherency is enforced
Table 20: PPC e500mc memory coherence
And the G bit is controlled by the inverted P4_M_C_PREFETCH attribute like table 21 shows.
P4_M_C_ G Description PREFETCH 0 1 Memory is guarded, prefetching is disabled 1 0 Memory is not guarded, prefetching is enabled
Table 21: PPC e500mc memory guard
A.5.4 VMIT Cache Modes
The VMIT cache modes map the settings listed in table 22(coherency always enabled).
VMIT cache mode Kernel cache WIMG Description attributes VM_MEM_CACHE_CB P4_M_C_WB 0010 write-back cacheable VM_MEM_CACHE_WT P4_M_C_WT 1010 write-through cacheable VM_MEM_CACHE_INHIBIT P4_M_C_UC 0111 uncached guarded VM_MEM_CACHE_WC P4_M_C_WC 0110 uncached non-guarded VM_MEM_CACHE_DEV P4_M_C_DEV 0111 uncached guarded
Table 22: PPC e500mc VMIT cache modes
A.6 Translation of Architecture Specific Exceptions to PikeOS Trap Codes
IVOR / Exception Trapcode Description 0 / Critical input - routed to PSP machinecheck() handler 1 / Machine check - routed to PSP machinecheck() handler 2 / DSI P4_TRAP_BUS Bus error if ESR.BO or ESR.XTE are set 2 / DSI P4_TRAP_SEG Page faults or access violations
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74 Architecture Dependencies
IVOR / Exception Trapcode Description 3 / ISI P4_TRAP_SEG Page faults or access violations 4 / External input - routed to PSP intdispatch() handler 5 / Alignment P4_TRAP_BUS Alignment faults 6 / Program P4_TRAP_TRP Trap instruction 6 / Program P4_TRAP_FP Floating-Point exception 6 / Program P4_TRAP_ILL Illegal instruction or unimplemented operand 7 / FPU unavailable P4_TRAP_FP_UNAVAIL Floating-Point unavailable 8 / System call P4_TRAP_SYS System call 9 / AP unavailable P4_TRAP_FP_UNAVAIL AP unavailable 10 / Decrementer - routed to PSP intdispatch() handler 11 / Fixed interval - routed to PSP intdispatch() handler 12 / Watchdog - routed to PSP machinecheck() handler 13 / Data TLB error - resolved internally 14 / Instruction TLB error - resolved internally 15 / Debug P4_TRAP_BRK Single stepping or other debug exception 35 / Performance monitor - used internally 36 / Processor doorbell - used internally 37 / Processor critical door- - used internally bell 38 / Guest processor door- - used internally bell 39 / Guest processor critical - used internally doorbell 40 / Hypervisor system call - used internally 41 / Hypervisor privilege - used internally
Table 23: PPC e500mc trap codes
A.7 Kernel Resources
Kernel memory is allocated in units whose size depend on the thrinfo_size configuration parameter. The maximum configurable thrinfo_size for the architecture is 4 pages (0x4000). The default is one page (0x1000 bytes) on 32 bit and 4 pages (0x4000 bytes) on 64 bit. There are no special alignment requirements for kernel resources. Table 24 shows the count of pages a resources will use on PPC e500mc architecture.
Resource Size in Units Description Task 1 Task descriptor (1 per task, mandatory) Thread 1 Thread control block (1 per thread) Pgdir 1 Page directory (1 per task, mandatory) Pgtable 1 Page table (1 per 4 MiB mapping)
Table 24: PPC e500mc page usage
A freshly activated task without any threads consumes two units, one for the task descriptor and one for the page directory.
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Cache Attributes Security 75
One idle thread is allocated on each CPU. A user space mapping created in an untouched 4 MiB area needs one unit for the page table. The maximum number of supported interrupts is 512.
A.8 Cache Handling
With split first level instruction and data caches, a PowerPC PSP implements the cache operations exported in the p4_cache() kernel API as listed in table 25.
Cache Operation Description
P4_INVAL_ICACHE_RANGE Write-back data cache with dcbst and invalidate instruction cache
with icbi.
P4_FLUSH_DCACHE_RANGE Flush data cache with dcbf.
P4_SYNC_DCACHE_RANGE Write-back data cache with dcbst.
P4_INVAL_DCACHE_RANGE Invalidate data cache with dcbi. Unaligned beginning or end are
flushed with dcbf.
Table 25: PPC e500mc cache handling
The PowerPC architecture has no issues with aliases in the instruction cache, the alias parameter in p4_cache() is always ignored. Typically, cache instructions like dcbf affect all levels of architecturally / core family defined caches and processor / SoC provided last-level caches and the flags parameter in p4_cache() is ignored. Whether an actual CPU requires explicit handling of last level caches or a PSP implements further operations on processor / SoC provided last-level caches is described in the according PSP section of the PikeOS Platform Manual. On a time partition switch, the behavior depends on the window flags configured in VMIT and the PSP implemen- tation. Typically, the PSP performs actions depending on the window flags:
• VM_SCF_INVAL_ICACHE: Invalidate the whole L1 instruction cache on the current processor using flash
invalidation.
• VM_SCF_FLUSH_DCACHE: Flush the whole L1 data cache on the current processor using dcbf.
Whether a PSP implements further cache flushes on L2 caches or other processor / SoC provided last-level caches is described in the according PSP section of the PikeOS Platform Manual. The p4_inval_icache_range(), p4_flush_dcache_range(), and p4_sync_dcache_range() func- tions are implemented as user space library calls. The p4_inval_dcache_range() function calls p4_cache() internally.
A.9 Cache Attributes Security
The QorIQ T-Series boards (T1040, T2080, T4240) might encounter a bus deadlock or a machine check exception when an atomic operation or a regular read/write access is performed on a memory area that is mapped with custom caching attributes. Due to this, the P4_AB_CACHE_CHANGE ability must not be granted to any partition running an unstrusted code.
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76 Architecture Dependencies
A.10 Speculative Execution Side Channels Mitigations - Meltdown and Spectre
PikeOS contains mitigations against the CVE-2017-5753 Spectre "Bounds Check Bypass" (Variant 1) processor vulnerability. Here, a new C macro is introduced to stop the Spectre Variant 1 speculation attack. The C macro P4_FENCE_INDEX() is described in PikeOS Kernel Reference Manual, section 1.40.1, page 567. The usage of this C macro in the application code depends on the results of the vulnerability analysis of your particular application or KDEV driver. The kernel always uses P4_FENCE_INDEX() to stop speculation for user-provided index values, e.g. task or thread IDs and file descriptors. No mitigations are available in this ASP for the CVE-2017-5715 Spectre "Branch Target Injection" (Variant 2) processor vulnerability. Also, PowerPC processors are not vulnerable to the CVE-2017-5754 Meltdown "Rogue Data Cache Load" pro- cessor vulnerability.
A.11 Limitations
The number of available PikeOS tasks is restricted to 255 due to the limitation of 256 distinctive address spaces in the MMU implementation on e500mc, e5500 and QEMU. One address space is used by the PikeOS kernel and can’t be used by a user space task. On PowerPC e6500 the number of tasks is not limited by the PikeOS ASP. SMP is only working with boot strategies uboot_dtb and uboot_dtb_unc. When memory higher than 2016 MiByte should be used, it must be mapped as VM_MEM_TYPE_IO_MEM in the VMIT. Copy operations from or to this memory (e.g. IPC) may be slower when the memory belongs to a task which is not the current one on the core. PSP may impose lower limit see the section 3, page 24 for the details. On core e6500 boards flush cache operations should not be executed on uncached memory. The P4_AB_CACHE_CHANGE ability should not be granted to untrusted partitions. It is also advisable not to change cache attributes for RAM regions in the VMIT, and not to use uncached memory for RAM.
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B Boards Fusion/PSP Projects
This chapter gives a table referencing for each available board the corresponding example projects. The example projects can be used as starting points for creating modified fusion and PSP projects. The example fusion projects are located in the /opt/pikeos-D5.0/demo/fusion-kernel and /opt/pikeos-D5.0/demo/fusion-pssw directories. The example PSP projects are located in the /opt/pikeos-D5.0/demo/psp directory.
Board Name Kernel Fusion PSSW Fusion PSP mfcc-8558 p4080-e500mc-e6500 standard p4080-e500mc-e6500 p2041rdb p4080-e500mc standard p4080-e500mc qemu-e500mc qemu-e500mc standard qemu-e500mc t1040rdb p4080-e500mc standard p4080-e500mc t2080qds p4080-e500mc-e6500 standard p4080-e500mc-e6500 t2080rdb p4080-e500mc-e6500 standard p4080-e500mc-e6500 t4240rdb p4080-e500mc-e6500 standard p4080-e500mc-e6500
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C Copyright Notices
The implementation of the PikeOS PSPs uses the libfdt for Flat Device Tree manipulation from FreeBSD source code and Flat Device Trees provided by Freescale. This requires us to state here the following copyright notices.
libfdt - Flat Device Tree manipulation Copyright (C) 2006 David Gibson, IBM Corporation.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
P4080DS Device Tree Source
Copyright 2009-2012 Freescale Semiconductor Inc.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: * Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. * Neither the name of Freescale Semiconductor nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
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79
ALTERNATIVELY, this software may be distributed under the terms of the GNU General Public License ("GPL") as published by the Free Software Foundation, either version 2 of that License or (at your option) any later version.
THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ‘‘AS IS’’ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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D Glossary
BASE Service Library: The BASE service library provides general purpose data types and services for devel- oping device drivers.
BLK Class: The BLK class defines client and configuration interfaces for drivers for mass storage devices, such as computer drives or flash memories.
BLK Service Library: The BLK service library provides data types and services for developing drivers for mass storage devices, such as computer drives or flash memories.
Block Device: A block device can be a hard disk or a solid state disk but e.g. also a USB flash drive. Block devices always allow a block of any size (including single characters/bytes) and any alignment to be read or written.
CAN Class: The CAN class defines client and configuration interfaces for CAN bus device drivers.
CAN Service Library: The CAN service library provides data types and services for developing CAN bus device drivers.
CHAR Class: The CHAR class defines client and configuration interfaces for generic I/O device drivers.
CHAR Service Library: The CHAR service library provides data types and services for developing generic I/O device drivers.
DIO Class: The DIO class defines client and configuration interfaces for digital I/O device drivers.
DIO Service Library: The DIO service library provides data types and services for developing digital I/O device drivers.
MTD: Memory Technology Device, a type of device file interacting with flash memory (NOR, NAND), not to be confused with non-raw flash devices, e.g. USB flash drives.
NET Class: The NET class defines client and configuration interfaces for Ethernet device drivers.
NET Service Library: The NET service library provides data types and services for developing Ethernet device drivers.
PCI Service Library: The PCI service library provides data types and services for accessing devices on the PCI bus.
SER Class: The SER class defines client and configuration interfaces for serial UART device drivers.
SER Service Library: The SER service library provides data types and services for developing serial UART device drivers.
SYS Service Library: The SYS service library provides data types and services for accessing devices on the system bus (non-PCI).
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