Enhance drm command, add drm xmm0 functionality (#15214) ##debug
* Add shorthand versions of `drm` - `drm[bwdq]` * Add mmx register to linux-x64
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Armin Weihbold
radare
parent
db1b79b125
commit
9b9103e00a
3 changed files with 127 additions and 42 deletions
2
.gitignore
vendored
2
.gitignore
vendored
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@ -119,4 +119,4 @@ doc/doxygen/html
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__pycache__
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# Dynamic docker building folder to minimize docker context
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.docker_alpine
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.ccls-cache/
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.ccls-cache/
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@ -329,9 +329,8 @@ static const char *help_msg_dr[] = {
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"drf", "", "Show fpu registers (80 bit long double)",
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"dri", "", "Show inverse registers dump (sorted by value)",
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"drl", "[j]", "List all register names",
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"drm", "", "Show multimedia packed registers",
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"drm", " mmx0 0 32 = 12", "Set the first 32 bit word of the mmx reg to 12",
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"drn", " <pc>", "Get regname for pc,sp,bp,a0-3,zf,cf,of,sg",
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"drm", "[?]", "Show multimedia packed registers",
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// "drm", " xmm0 0 32 = 12", "Set the first 32 bit word of the xmm0 reg to 12", // Do not advertise - broken
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"dro", "", "Show previous (old) values of registers",
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"drp", "", "Display current register profile",
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"drp", "[?] <file>", "Load register metadata file",
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@ -395,6 +394,18 @@ static const char *help_msg_drx[] = {
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NULL
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};
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static const char *help_msg_drm[] = {
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"Usage: drm", " [reg] [idx] [wordsize] [= value]", "Show multimedia packed registers",
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"drm", " xmm0", "Show all packings of xmm0",
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"drm", " xmm0 0 32 = 12", "Set the first 32 bit word of the xmm0 reg to 12", //broken
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"drmb", " <reg>", "Show register as bytes",
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"drmw", " <reg>", "Show register as words",
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"drmd", " <reg>", "Show register as doublewords",
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"drmq", " <reg>", "Show register as quadwords",
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NULL
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};
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static const char *help_msg_ds[] = {
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"Usage: ds", "", "Step commands",
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"ds", "", "Step one instruction",
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@ -2531,44 +2542,101 @@ static void cmd_debug_reg(RCore *core, const char *str) {
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break;
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case 'm': // "drm"
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if (str[1]=='?') {
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eprintf ("usage: drm [reg] [idx] [wordsize] [= value]\n");
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} else if (str[1]==' ') {
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int word = 0;
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// eprintf ("usage: drm [reg] [idx] [wordsize] [= value]\n");
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r_core_cmd_help (core, help_msg_drm);
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} else if (str[1] == ' ' || str[1] == 'b' || str[1] == 'd' || str[1] == 'w' || str[1] == 'q') {
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char explicit_index = 0;
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char explicit_size = 0;
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#define NUM_PACK_TYPES 4
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int pack_sizes[NUM_PACK_TYPES] = { 8, 16, 32, 64 };
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char *pack_format[NUM_PACK_TYPES] = { "%s0x%02" PFMT64x, "%s0x%04" PFMT64x, "%s0x%08" PFMT64x, "%s0x%016" PFMT64x };
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#define pack_print(i, reg, pack_type_index) r_cons_printf (pack_format[pack_type_index], i != 0? " ": "", reg);
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char pack_show[NUM_PACK_TYPES] = { 0, 0, 0, 0 };
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int index = 0;
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int size = 0; // auto
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char *q, *p, *name = strdup (str+2);
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char *eq = strchr (name, '=');
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if (eq) {
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*eq++ = 0;
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}
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p = strchr (name, ' ');
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if (p) {
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*p++ = 0;
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q = strchr (p, ' ');
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if (q) {
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*q++ = 0;
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size = r_num_math (core->num, q);
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char *q, *p, *name;
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char *eq = NULL;
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if (str[1] == ' ') {
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name = strdup (str + 2);
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if (eq) {
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*eq++ = 0;
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}
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p = strchr (name, ' ');
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if (p) {
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*p++ = 0;
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q = strchr (p, ' ');
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if (p[0] != '*') {
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// do not show whole register
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explicit_index = 1;
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index = r_num_math (core->num, p);
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}
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if (q) {
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*q++ = 0;
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size = r_num_math (core->num, q);
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for (i = 0; i < NUM_PACK_TYPES; i++) {
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if (size == pack_sizes[i]) {
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explicit_size = 1;
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pack_show[i] = 1;
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}
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}
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if (!explicit_size) {
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eprintf ("Unsupported wordsize %d\n", size);
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break;
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}
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}
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}
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} else {
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explicit_size = 1;
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name = strdup (str + 3);
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if (str[1] == 'b') { // "drmb"
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size = pack_sizes[0];
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pack_show[0] = 1;
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} else if (str[1] == 'w') { // "drmw"
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size = pack_sizes[1];
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pack_show[1] = 1;
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} else if (str[1] == 'd') { // "drmd"
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size = pack_sizes[2];
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pack_show[2] = 1;
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} else if (str[1] == 'q') { // "drmq"
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size = pack_sizes[3];
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pack_show[3] = 1;
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}
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word = r_num_math (core->num, p);
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}
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// TODO: sanity check index, size against item->packed_size
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RRegItem *item = r_reg_get (core->dbg->reg, name, -1);
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if (item) {
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if (eq) {
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if (eq) { // TODO: fix setting xmm registers
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ut64 val = r_num_math (core->num, eq);
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r_reg_set_pack (core->dbg->reg, item, word, size, val);
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r_reg_set_pack (core->dbg->reg, item, index, size, val);
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r_debug_reg_sync (core->dbg, R_REG_TYPE_GPR, true);
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r_debug_reg_sync (core->dbg, R_REG_TYPE_MMX, true);
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} else {
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r_debug_reg_sync (core->dbg, R_REG_TYPE_GPR, false);
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r_debug_reg_sync (core->dbg, R_REG_TYPE_MMX, false);
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ut64 res = r_reg_get_pack (core->dbg->reg, item, word, size);
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r_cons_printf ("0x%08"PFMT64x"\n", res);
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ut64 res = r_reg_get_pack (core->dbg->reg, item, index, size);
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// TODO: handle mm
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if (!explicit_index) {
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int pi;
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for (pi = 0; pi < NUM_PACK_TYPES; pi++) {
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if (!explicit_size || pack_show[pi]) {
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for (i = 0; i < item->packed_size / pack_sizes[pi]; i++) {
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ut64 res = r_reg_get_pack (core->dbg->reg, item, i, pack_sizes[pi]);
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pack_print (i, res, pi);
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}
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r_cons_printf ("\n");
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}
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}
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} else {
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// print selected index / wordsize
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r_cons_printf ("0x%08" PFMT64x "\n", res);
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}
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}
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} else {
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eprintf ("cannot find multimedia register '%s'\n", name);
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}
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free (name);
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} else {
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r_debug_reg_sync (core->dbg, -R_REG_TYPE_MMX, false);
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} else { // drm # no arg
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r_debug_reg_sync (core->dbg, -R_REG_TYPE_MMX, false); // TODO: fix this, not displaying anything
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}
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//r_debug_drx_list (core->dbg);
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break;
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@ -144,28 +144,45 @@ return strdup (
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"fpu st6 .80 128 0\n"
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"fpu st7 .80 144 0\n"
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"fpu xmm0h .64 160 0\n"
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"fpu xmm0l .64 168 0\n"
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"mmx@fpu mm0 .64 32 8\n"
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"mmx@fpu mm1 .64 48 8\n"
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"mmx@fpu mm2 .64 64 8\n"
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"mmx@fpu mm3 .64 80 8\n"
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"mmx@fpu mm4 .64 96 8\n"
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"mmx@fpu mm5 .64 112 8\n"
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"mmx@fpu mm6 .64 128 8\n"
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"mmx@fpu mm7 .64 144 8\n"
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"fpu xmm1h .64 176 0\n"
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"fpu xmm1l .64 184 0\n"
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"fpu xmm0 .64 160 16\n"
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"fpu xmm0h .64 160 8\n"
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"fpu xmm0l .64 168 8\n"
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"fpu xmm2h .64 192 0\n"
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"fpu xmm2l .64 200 0\n"
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"fpu xmm1 .64 176 16\n"
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"fpu xmm1h .64 176 8\n"
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"fpu xmm1l .64 184 8\n"
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"fpu xmm3h .64 208 0\n"
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"fpu xmm3l .64 216 0\n"
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"fpu xmm2 .64 192 16\n"
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"fpu xmm2h .64 192 8\n"
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"fpu xmm2l .64 200 8\n"
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"fpu xmm4h .64 224 0\n"
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"fpu xmm4l .64 232 0\n"
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"fpu xmm3 .64 208 16\n"
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"fpu xmm3h .64 208 8\n"
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"fpu xmm3l .64 216 8\n"
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"fpu xmm5h .64 240 0\n"
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"fpu xmm5l .64 248 0\n"
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"fpu xmm4 .64 224 16\n"
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"fpu xmm4h .64 224 8\n"
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"fpu xmm4l .64 232 8\n"
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"fpu xmm6h .64 256 0\n"
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"fpu xmm6l .64 264 0\n"
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"fpu xmm5 .64 240 16\n"
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"fpu xmm5h .64 240 8\n"
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"fpu xmm5l .64 248 8\n"
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"fpu xmm7h .64 272 0\n"
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"fpu xmm7l .64 280 0\n"
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"fpu xmm6 .64 256 16\n"
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"fpu xmm6h .64 256 8\n"
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"fpu xmm6l .64 264 8\n"
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"fpu xmm7 .64 272 16\n"
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"fpu xmm7h .64 272 8\n"
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"fpu xmm7l .64 280 8\n"
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"fpu x64 .64 288 0\n"
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);
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