Commit graph

77 commits

Author SHA1 Message Date
NOT XVilka
155ead6822
librz/reg: derive CC with more than four argument registers (#6600)
rz_reg_profile_to_cc() only emitted the first four argument registers
(A0-A3), so architectures that pass more arguments in registers -- the
C6000 EABI uses ten, and x86-64/riscv/ppc all declare more than four --
got a truncated convention. Walk the whole A0-A9 role range, stopping at
the first role the profile leaves undefined, and build the cc string with
RzStrBuf. Covered by a new test_reg unit test.

Co-authored-by agent: Claude/claude-opus-4-8

Co-authored-by: Anton Kochkov <anton.kochkov@gmail.com>
2026-07-06 03:35:41 +08:00
NOT XVilka
86c8620662
librz/reg: handle 1 bit fields the same on BE and LE (#6496)
Co-authored-by: Anton Kochkov <anton.kochkov@gmail.com>
2026-06-11 16:10:32 +08:00
Florian Märkl
245e198cf1
RzReg: Associate roles with RzRegItem instead of name strings (#6291)
Register roles (RzRegisterId) are now associated directly with an
RzRegItem in RzReg rather than mapping to name strings, which previously
needed an additional hashtable lookup to get more information about the
register. Conversely, if the name is needed from an RzRegItem, it is
available directly as a member.

This is not a pure refactor as there were cases before where a register
name was assigned to a role in the register profile, but no register
actually existed under that name. Such cases will now cause a warning to
be printed during profile load and the role association will be ignored.
Changes in register profiles in this commit are for fixing such cases.
2026-04-30 12:03:51 +02:00
Giovanni
daeee9ac1a
Fix ISO C23 warnings related the usage of strstr & strchr (#6182) 2026-04-08 22:04:39 +08:00
Khairul Azhar Kasmiran
2d49628aee
Remove rz_list_iter_get_data() (#5900)
* Remove rz_list_iter_get_data()
* Use rz_list_val() instead of rz_list_iter_get_data()
2026-02-10 22:03:37 +08:00
Khairul Azhar Kasmiran
e4ed1d3436
Fix "exeeds" typo (#5760) 2026-01-09 21:26:26 +08:00
Khairul Azhar Kasmiran
c1fc1419e4
Rename some rz_list funcs to rz_list_XXX_val (part 1) (#5671)
* Rename rz_list_find_ptr() to rz_list_find_val()
* Rename rz_list_delete_data() to rz_list_delete_val()
2025-12-25 22:01:49 +08:00
Khairul Azhar Kasmiran
b96202ad48
Rename rz_list_first() / rz_list_last() to rz_list_first_val() / rz_list_last_val() (#5654) 2025-12-20 17:08:59 +08:00
NOT XVilka
c5090bf2bd
librz/reg: constify rz_reg_get() context argument (#4937)
Co-authored-by: Anton Kochkov <anton.kochkov@gmail.com>
2025-02-26 01:12:51 +08:00
Rot127
a3e9fec7f4
Fix leaks during register profile parsing. (#4813)
* Add ownership info to reg_profile

* Fix leaks during register profile parsing.
2025-01-02 15:03:31 +00:00
Giovanni
db1e4993a0
Replace strdup with rz_str_dup (#4634) 2024-09-15 19:12:07 +08:00
z3phyr
c02c0b744e
core/rop: refactor and grep ROP info (#4569) 2024-07-31 21:50:50 +08:00
pelijah
f2d8e0db3d
Add HtSP, HtSS, HtSU, SetS (#4415)
- All `ht_*_new0()` are removed
- `freefn` field of HT options was renamed to `finiKV`
- `finiKV_user` fields was added to HT options
- Added `ht_*_new_opt_size` API
- `HtSP` and `HtUP` are created with `ValueFree` callback  that allows to reduce extra LOC and prevent bugs
- `SetP` replaced with `SetS` (based on `HtSP`)
- `rz_th_ht_*_new0()` and `rz_th_ht_*_new_opt()` are replaced with `rz_th_ht_*_new(HtXX *)`
2024-04-16 20:27:48 +08:00
Giovanni
c7ddd77546
Remove rz_list_get_top/bottom & rz_list_get_head/tail_data (#4348) 2024-03-09 18:24:23 +08:00
Anton Kochkov
25fd417a28
Add user pointer to RzListComparator (#4204) 2024-02-11 13:28:33 +08:00
Huzaifa
e82033d92c
Convert from rz_str_new to rz_str_dup (#4178) 2024-02-07 00:07:53 +08:00
Rot127
5afc51f0e2
Replace current regex engine with PCRE2 (#4185)
* Replace OpenBSD regex library with PCRE2.

PCRE2 has way better performance than the OpenBSD
library (something around 20 times faster).

The following flags are enabled for every pattern:

- PCRE2_UTF
- PCRE2_MATCH_INVALID_UTF
- PCRE2_NO_UTF_CHECK

All the others are optional.

Changes made:

- Adds PCRE2 as subproject.
- Changes the API away from POSIX to PCRE2.
- Edits many regex patterns because:
 - ' ' is skipped in patterns, if the EXTENDED flag is set for matching. '\s' must be set now.
 - '.' doesn't match newlines by default.
- Changes the API so matches and their groups are bundled into PVectors.
- Moves the regex component to rz_util.

* Fix cross build - add copy of PCRE2 dependecy

Meson currently doesn't support subprojects to be native and non-native at the same time.
See: https://github.com/mesonbuild/meson/issues/10947
Unfortunately, sdb depends on rz_util which in turn depends on PCRE2.
Excluding PCRE2 from the native build makes linking of rz_util not possible anymore.
Adding it, will make Meson complain that the dependencies cannot be mixed.

Hence, we compile a copy of PCRE2 for the native build if required.
2024-02-05 12:51:16 +08:00
Giovanni
8fba9b4189
Force usage of RzList methods instead of direct access of the fields (#4036) 2023-12-18 21:05:57 +08:00
Riccardo Schirone
3b903caa96
librz: add some initial documentation (#3782) 2023-10-13 13:46:19 +08:00
Quentin Minster
b82215965e
Refactor pointer write command * to use the API (#3793)
* Add tests for pointer write command `*`

Some test cases override `asm.arch` for bitness compatibility reasons.

* Refactor pointer write command `*` to use the API

* Allow use of more general exprs as value for pointer write command `*` ##shell

* Instead of detecting when to write a value, and write a hexpair
  otherwise, do the inverse: detect when to write a hexpair, and write a
  value otherwise. This allows more general value exprs such as
  variables, derefs, ...

* To enable this, add an option to `rz_hex_str_is_valid` so it can
  reject a 0x-prefixed string (because 0x-prefixed strings should be
  handled as values, not hexpairs, by the pointer write command)

* Add a test case to ensure a non-0x-prefixed value arg, that's not a
  valid hexpair, now gets eval'ed as an expr by the pointer write
  command (where previously it would throw an error)
2023-08-26 23:40:31 +08:00
Pavel I
73fcbd801d Fix memleak in parse_reg_profile_str() 2023-08-14 13:08:22 +08:00
Pavel I
779c5b2566 Fix memleak in rz_reg_item_free() 2023-08-14 13:08:22 +08:00
Riccardo Schirone
d6196703d8 Fix conversion from GDB register profile to rizin profile 2023-03-14 11:41:29 +01:00
Khairul Azhar Kasmiran
80fb4303a8
gdb_to_rz_profile: Check whether groups exist (#3253) 2022-12-17 13:07:32 +08:00
billow
291d2a683c
Uplifting 8051 architecture to new IL (#2999) 2022-12-14 13:13:21 +01:00
Giovanni
55e690990b
Fix endianness for win pagedump and winkd (#3204) 2022-12-09 11:41:28 +01:00
wargio
fe00dcdf68 Rewrite RzReg to use RzBitVector 2022-11-01 10:58:16 +08:00
Giovanni
726614d09e
Fix endiannes issues on RzReg (#3106) 2022-10-19 09:56:12 +08:00
Dean
59b38e6efa
Add /*<type>*/ comments everywhere (#2986)
Adds /*<type>*/ comments and a linter check from rz-bindgen to enforce
their existence and consistency

Also includes the following fixes made when adding the annotations:
* removed unused intern_table arguments in pyc_dis.c, pyc_dis.h, asm_pyc.c
* removed unused classes argument from place_nodes in agraph.c
* removed unused recurse and recurse_bb functions in canalysis.c
* removed unused vars field from RzPrint struct
* removed unused RzAnalysisType* structs from rz_analysis.h
* removed unused list field from RzEgg struct
* fixed bug in bp_plugin.c where duplication-checking logic iterates over the wrong list
* removed unused q_regs field from RzDebug struct
* removed unused backtrace field from RzDebugPlugin struct
* removed unused classes_list field from RzBinNXOObj struct
* removed unused methods_list and classes_list fields from RzBinZimgObj struct
2022-09-11 13:04:53 +08:00
Florian Märkl
4e5857cacf
Meson refactor: collect modules in dict and centralize config (#2945)
Duplicated code for pkg-config and cmake configuration is avoided by
letting every rizin module register itself in a global dictionary
called "modules" which is then iterated in one place to perform any
shared logic, inspired by how qemu handles multiple targets in its meson
build system.

This is an almost pure refactor, so the resulting .pc/.cmake files
should be identical with the following exceptions:
- rz_reg.pc does not have plugindir anymore as rz_reg has no plugins.
- Some other modules have their dependencies in .pc files altered to be
  consistent with cmake.
2022-08-20 19:59:27 +02:00
Rot127
b46e7bd4f2
PPC uplifting to RzIL (#2823)
* Print a warning if config for VM was NULL.
* Add warning if register is not added to VM due to overlap.
* Update PPC register profile.
* Add vector and float registers. As well as some control and system registers.
* Enable to write values 4bit registers.
* PPC: Uplift most common instructions.
* Print warning if reserved SPR instruction is encountered.
* Update PC/LR addresses and add ca32 writes.
* Write cache needs to get flushed so load and store tests don't share the same memory.
* Add missing T/F branch mnemonics.
* Add Move to/from CR/CR0-7
* Fix TA address calculation for branch instructions.
* Add branch tests for branch mnemonics.
* Add XNOP
* NOP cache touch instructions.
* Add undocumented ATTN instruction to the not_implemented group.
* Add isel instruction.
* Implement CRCLR, CRSET, CROR.
* Add CNTLZ instructions.
* Add mcrf instructions.
* Add inacive test for cmpb.
* Add Load bytes reverse instructions.
* Add test and add address alignment to dcbz.
* Add eqv test
* Correct DIV and MUL operations
* Add div tests.
* Add tests and correct MT/MFXER
* Remove register ca32, ov32
* Remove explici setting of cr register because QEMU does not do it. Otherwise we get a mismatch in the trace
* Simplify carry set for add and sub. Sub instructions are exclusivly defined with addition. Hence no sub case needed.
* Unify BD and fix branch instructions. Fix: Check the single bit not the cr reg
* Document Conditional branches and replace NOPs with EMPTY
* Add mulli instruction to double word instructions.
* Fix ca set for shift instructions:
* ca value had to be determined before the shift happened. The wrong ca value was calculated if the src and target reg were the same.
* Replace NOP wit EMPTY.
* Use MSB isntead of SLT.
* Brought fixup of ADD and SUB instructions: The add and sub instructions had several issues which let to incorrect execution.
* The carry was incorrectly if three add operations happened (only the last add were checked, not both).
* The carry was incorrectly set if the src and target register matched.
* Same applies for the CR bit.
* It was too complex. Several local variables were introduced for this.
* Set result in local var, since it would change if src and target reg are the same.
* Remove MTMSR and MFMSR since it is too complex and untestable currently.
* Use unsigned int for shift. Otherwise the 0x1c shift produces a runtime error since 0xf is int as default.
* Fix mtxer: Only write flag bits.
* Let NOT_IMPLEMENTED macro return NULL.
* Mark st[wd]cx and l[wd]cx as not implemented.
* Increase dcache_line_size to 128 bytes.
* Fix cntlz for ppc32. m was set incorrectly, since it is 0 not 32 for 32bit cpus.
* Fix isel: Use op.crx reg instead of imm.
* Unify helper function names: Prependnig `ppc_` mark as IPI
* Add more "Move to SPR" cases.
* MULLI opeartes only on double word on 64bit CPUs.
* Most registers are now assigned the control register type and no longer show up in the ar command.
* Fix xor if dest and src registers match by saving result in local var.
* Fix BE/LE issue for Load BRX instructions.
* Fix shifts: Use only lower 6bits of n.
* User Pure local variables for ROT macros.
* Fix rldimi instructions.
* n was not inverted.
* more than 6 bits of n could be used
* Add 32bit emulateme tests.
* Add 64bit emulateme tests.
* Determine lg(v) in inline function.
* Calculate CR bit in C not in the VM.
* Check if `~mask = 0` and skip mask calculation if yes.
* Check for `sh == 0` and skip rotations where possible.
* Remove `la` instruction. `la` is a mnemonic for `addi`.
* Remove SPR instructions which are not supported by QEMU or not traced yet. For most set/read SPR instructions QEMU segfaults.


In case of SPR 1 (xer), 8 (lr) and 9 (ctr) the assembler resolves them to their mnemonics (mtxer, mtlr etc.). This means the code here is never reached.
To test the get_xer code MFXER was added again. The rz-tracetests will fail for this instructions (due to missing ca32, ov32). But this case is covert in an issue.
2022-08-11 08:41:15 +08:00
wingdeans
a6a7a5f530 Fix annotation inconsistencies 2022-08-03 00:29:56 -04:00
Florian Märkl
05a01569ac
Move warning from rz_reg_type_by_name to profile parsing (#2850)
The warning about non-existent register types is useful for register
profile parsing errors, but this function is also used by e.g.
`ar`/`dr`, so the overloaded `ar` would print a warning when given a
specific register name for example.
2022-07-28 15:22:04 +02:00
Riccardo Schirone
503b3baeeb reg: remove x86-linux.regs unused file 2022-07-20 22:04:02 +02:00
Rot127
5a38df5294
Fix: register profile comments parsing (#2806)
Parse comments in register profile definitions correctly.
2022-07-18 19:36:56 +08:00
Riccardo Schirone
8939fdbd7d
Use add_global_arguments instead of passing cflags/ldflags all around (#2812)
See also 66a0e22293/docs/TESTING_WITH_SANITIZERS.md (clang)
2022-07-17 21:33:51 +08:00
Riccardo Schirone
6c665c6098 Use Rizin specific macros instead of the ones from SDB 2022-07-17 12:11:13 +02:00
Rot127
2abf3b6796 Fix: CID 395273 2022-07-04 21:59:30 +08:00
Rot127
2a5760b057 Fix: CID 395277 2022-07-04 21:59:30 +08:00
Rot127
8edbf9e2f1 Fix CID 395278 2022-07-04 21:59:30 +08:00
Giovanni
5d344b2e95
Fix use after free in profile.c (#2721)
* Fix use after free in profile.c

* fixed error
2022-06-21 21:10:10 +02:00
Rot127
f108873520
Rework register profile parsing
**Register profile parsing**

- Types, sizes, and offsets get now parsed separately in their own functions.
- More logging added.
- The string is first parsed into a list of register definitions and alias (`RzRegProfileDef`, `RzRegProfileAlias`) and afterward applied to `RzReg.regset`.
- Documentation was added on how the register profile needs to be formatted.
- Functions are more consistent with return types (most return `bool` now instead of `Error Msg` + `NULL`).

**New register profile structs**

The register profile of `RzReg` consists of two lists with alias and definitions.
I chose lists over NULL-terminated arrays because they were a little easier to handle during parsing (no memory management).
Please let me know if you would strongly prefer the NULL-terminated version.
2022-06-20 20:54:42 +08:00
Anton Kochkov
2188b4564d
Various Coverity fixes (#2615)
* Fix CID 392733 - memory leak

* Fix CID 392732 - memory leak

* Fix CID 392730 - memory leak

* Fix CID 392729 - memory leak

* Fix `rz_analysis_diff_free()` API function

* Fix CID 392685 - memory leak

* Fix CID 392012 - use after free

* Fix CID 391968 - uninitialized pointer read

* Fix CID 391966 - memory leak

* Fix CID 391964 - uninitialized pointer read

* Fix CID 390013 - memory leak

* Fix CID 389939 - memory leak

* Fix CID 379249 - memory leak

* Fix CID 378881 - uninitialized scalar variable

* Fix CID 378973 - uninitialized scalar variable

* Fix CID 378850 - uninitialized scalar variable

* Fix CID 371079 - memory leak

* Fix CID 367478 - memory leak

* Fix CID 366821 - memory leak

* Fix CID 366736 - memory leak

* Fix CID 361684 - uninitialized scalar value

* Fix CID 352581 - memory leak

* Fix CID 352557 - memory leak

* Fix CID 348937 - memory leak

* Fix CID 322229 - memory leak

* Fix CID 320122 - memory leak

* Fix CID 317611 - memory leak
2022-05-15 23:15:28 +08:00
Riccardo Schirone
ce6ac3e467 meson: use major/minor only in the lib soversion 2022-05-10 21:04:43 +02:00
Rot127
10bedc2b00
Add Hexagon register profile (#2490)
Although the reg profile was not really used yet it will be relevant for the RZIL uplifting.
Introduces:
* Double/quadruple registers now properly overlap with their counterparts.
* Registers have correct types assigned (vec, ctr, sys etc. Before, all regs were of type gbr)
* Consistent register names (asm name style: c3:2, r31 etc, alias style: lc1:sa1, lr etc.)
* Adds _tmp registers in the profile. Later used by uplifted instructions (think of .new registers).
2022-04-03 18:26:17 +02:00
Giovanni
bfec86a12e
Add option to install sigdb systemwise and custom user location for additional signatures (#2328) 2022-02-28 14:32:38 +01:00
Florian Märkl
9938a85c4b
[RzIL] Add RzReg/Variable Binding (#2155)
Plugins do not create register-based variables themselves anymore, but
they are derived from the register profile. However not all registers
may be bound and not all variables may be actual registers. The concrete
relations between an RzILVM and registers is described by an
RzILRegBinding object. It is simply a list of register names and
variables are created of the same names. When stepping with aezs, the
registers are synchronized automatically. From now on, aezv is primarily
useful for debugging, but interacting with emulation from the user side
should be done with ar.
2022-01-02 17:56:19 +00:00
Riccardo Schirone
6f40dfe493
Move remaining things from shlr/ to meson subprojects (#2126)
* Move binrz meson directives to binrz/ dir

* Move rizin-shell-parser to a subproject

* Move bochs to a meson subproject

* Move rzqnx to meson subproject

* Move winkd to a meson subproject

* Move rzar to a meson subproject

* Move rzw32dbg_wrap to a meson subproject

* Move ptrace-wrap to a meson subproject

* Move rzgdb to a meson subproject

* Rename w32dbg_wrap to rzw32dbg_wrap

* Update CODEOWNERS

* Remove old references to shlr

* Move shlr/heap stuff in core and remove shlr/arm

* Move spp to a meson subproject

* Remove last references to shlr

* Remove use_webui option

* Move include files directives to librz/include/meson.build

* Move librz meson directives into librz/meson.build

* Handle d/ directories inside the specific module meson.build

* Move plugins listing to specific module meson.build

* Move rzheap to its own subproject

* Fix js linter and licenses

* Use meson.override_dependency for all rz_ modules
2021-12-22 09:20:39 +08:00
Florian Märkl
b179a5f3c6 Refactor rz_debug_reg_get()/set()
* Logic for getting a register by role or name, whichever matches, moved
  to RzReg (rz_reg_get_by_role_or_name)
* Removed rz_debug_reg_err() because it's unnecessary
* Added rz_core_reg_getv_by_role_or_name() and
  rz_core_reg_aetv_by_role_or_name() to replace rz_debug_reg_get() for
  for usage whenever it is not debug-specific.
2021-12-21 13:14:08 +01:00
Riccardo Schirone
47e1cb8335
Provide CMake config files for CMake projects (#2057)
* Remove wrong librz.pc.in file
* Add plugindir variable to .pc files to allow easy plugin configuration
* Add CMake config files to find Rizin in CMake projects
* Add CI jobs to check cmake files
* Provide workaround for mesonbuild/meson#9702
* Use .lib suffix and no prefix on MSVC to make CMake files work
* Disable cmake files on static libraries build
2021-12-17 09:16:25 +00:00