RzDebug.bits often has nonsensical contents set from all kinds of
places. Specifically, when debugging fat binaries on arm64, it had a
value not matching the debuggee when the reg profile was loaded,
resulting in the arm32 profile being used.
The right way to determine the profile is to do it after attach, when
the cpu type of the debuggee is known.
Variables on the stack are not identified by bp/sp+<offset> anymore, but
by their address from the bottom of the stack frame (RzStackAddr),
independent of how they are accessed.
So now there are only two kinds of variables: stack and register.
This required some major refactoring and other changes:
* RzAnalysisVar.isarg was removed. Whether a variable is an argument is
now specified implicitly by its storage location.
* Varsub of struct fields had to be rewritten so fields can be queried
by arbitrary stack addresses using the recently introduced sp
tracking, as the old approach to fill a list with all fields would not
work anymore.
* analysis.vars.stackname was removed, new behavior is more similar to
this being true before.
* Variables will not be created at stack+0 now, because the return
address is there. Before, vars were only created sometimes in such
cases.
* Variables created from bp offsets in x86 are not deleted anymore if
the function's bp_frame is false (see removed
rz_analysis_function_delete_vars_by_kind(fcn,
RZ_ANALYSIS_VAR_KIND_BPV); calls). This may lead to some
false-positive detected variables. Whether this really is a practical
issue is yet to be seen. At least there are no meaningful tests that
are broken by this.
* Applying variables from dwarf needed some fixes for determining the
correct stack locations of variables in order to write meaningful
tests. The handling is still not entirely correct for all
possibilities of dwarf info, but at least the changed/added test cases
are right and serve as a reference for future changes.
* Projects version 11 is introduced.
* afvb commands have been removed, afvs now handles all stack vars.
The previous reading code was slow (performed too many
vm_region_recurse_64 calls) and broken, for example at boundaries of
memory maps. Details can be found in the code comments.
Previously, on macOS we were detaching properly when the user quit rizin
after an interactive `rz -d <file>` session, but not on
`rz -d -Qc <cmd> <file>`, which would leave behind a zombie process.
Now, the process is detached and keeps running, which also matches the
behavior on Linux. Hence the `dk 9` additions in the tests, to not
spoil the output with whatever the processes print.
ARM_THREAD_STATE64 fetches arm_thread_state64_t but our struct was
arm_unified_thread_state_t, which adds a header. The pc in the register
profile was hacked to account for the shift, but all the x-regs were
not, so x7 had the value of x8 for example. Now we just use the specific
state for 32 or 64.
This fixes basic single-stepping on macOS/arm64.
dbg->bits is affected by all kinds of things going on in rizin, in
particular it currently randomly switches to 16 when calling pd during
an arm64 debug session, causing the stepping code to break.
We now fetch the cpu type of the process once during attach, similar to
how lldb does it. They also use 0 for the "invalid" value, so we do that
as well.
This fixes the following minor issues:
* Errors like "Cannot create flag (...) because there is already (...)
flag" during debug startup
* Unnecessary seeks during .dm* causing io reads and e.g. delays of up
to 5s on x86 macOS during debug startup
* Flags are now created in the "maps" flagspace, rather than globally,
making them easier to clean up later
* Flags now have the same size as the maps and not +1
Entire files are now avoided to be built by checking in meson rather
than using #if DEBUGGER. This now also includes bsd_debug.c, which
is currently slightly broken on OpenBSD/sparc64 and caused compile
errors even with -Ddebugger=false.
Although the reg profile was not really used yet it will be relevant for the RZIL uplifting.
Introduces:
* Double/quadruple registers now properly overlap with their counterparts.
* Registers have correct types assigned (vec, ctr, sys etc. Before, all regs were of type gbr)
* Consistent register names (asm name style: c3:2, r31 etc, alias style: lc1:sa1, lr etc.)
* Adds _tmp registers in the profile. Later used by uplifted instructions (think of .new registers).
