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684 commits

Author SHA1 Message Date
Julia Vassiliki
b57b3de195 libsel4: export seL4_IOPageTable{Index,Entry}Bits
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This is useful for all x86 IOMMU work, which otherwise has
to duplicate the definitions of VTD_PT_INDEX_BITS in userspace
code. Follow the same pattern as many other existing code in
the libsel4 headers where the kernel depends on it.

Note we can't define seL4_IOPageTableBits in terms of Index + Entry
because the capDL tool does the c-preprocessor to make a YAML file
containing the constant, and it won't do evaluation.

Signed-off-by: Julia Vassiliki <julia.vassiliki@unsw.edu.au>
2026-07-08 16:33:54 +10:00
Ivan Velickovic
b7ef16a42d Add support for Raspberry Pi 5B
Specifically, the 2GB variation.
The BCM2712 core is a Cortex-A76.

Signed-off-by: Ivan Velickovic <i.velickovic@unsw.edu.au>
2026-07-07 13:30:25 +10:00
Ivan Velickovic
973cbf4e08 Add support for ARM Cortex-A76
This micro-arch is used by the RPi5.

Signed-off-by: Ivan Velickovic <i.velickovic@unsw.edu.au>
2026-07-07 13:30:25 +10:00
Julia Vassiliki
c8526a426f libsel4: deprecate old seL4_UserTop constant
This value was inconsistent across platforms, and one
should use seL4_UserVSpaceTop instead.

Signed-off-by: Julia Vassiliki <julia.vassiliki@unsw.edu.au>
2026-07-01 10:57:37 +10:00
Julia Vassiliki
dbc3da9d97 libsel4: add new seL4_UserVSpaceTop constant
This is a consistent, inclusive-top value that is conveying
similar information to that of seL4_UserTop. We are adding
this so as to not break existing userspace, but it will make
it easier for userspace to deal with other platforms.

Signed-off-by: Julia Vassiliki <julia.vassiliki@unsw.edu.au>
2026-07-01 10:57:37 +10:00
Corey Lewis
ae11cf1450 tools: Support multiple methods with the same id
The check for both label and condition is there to handle cases like:

 enum invocation_label {
    Invalid,
 #if A
    LabelOne,
 #endif
 #if B
    LabelOne,
 #endif
 }

Co-authored-by: Indan Zupancic <Indan.Zupancic@mep-info.com>
Signed-off-by: Corey Lewis <corey.lewis@proofcraft.systems>
2026-06-23 17:17:39 +01:00
Indan Zupancic
f2ab32d203 Debug, x86: Fix seL4_DebugGetThreadAffinity
Currently causes compile errors. It should match seL4_DebugCapIdentify,
except return affinity instead of cap type.

Signed-off-by: Indan Zupancic <indan@nul.nu>
2026-06-23 08:27:38 +10:00
Julia Vassiliki
90b5159800 debug: add get thread affinity syscall
This is useful for sel4test et al for testing that a certain
PD has been succesfully migrated between cores, or that it
is running on a particular core.

Signed-off-by: Julia Vassiliki <julia.vassiliki@unsw.edu.au>
2026-06-22 18:06:26 +10:00
Julia Vassiliki
4ee903cf50 syscall xml: only define DebugSendIPI when SMP
The actual libsel4 wrappers and kernel code only ever exists
when CONFIG_ENABLE_SMP_SUPPORT exists, so there's no point
also defining the syscall code as well.

Signed-off-by: Julia Vassiliki <julia.vassiliki@unsw.edu.au>
2026-06-22 18:06:26 +10:00
Gerwin Klein
c962e51e3b constants: decrease TCB_SIZE_BITS for some configs
The IPC queue changes for MCS in commit 771c9e43ce has decreased the
TCB size slightly, which brings TCB_SIZE_BITS down for config
combinations that have MCS + SMP + HYP + benchmarking enabled.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2026-05-22 13:31:04 +01:00
Christian Bruel
c75cf0e2da Add support for stm32mp2 SoC family
Add support for STM32MP2 SoC A35 core and stm32mp25-ev1 board.

Supports HYP and SMP configurations
-DPLATFORM=stm32mp2 -DKernelARMlatform=stm32mp257f-ev1 (default)

Supports MCS configuration (for Microkit build)

Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
2026-05-19 13:28:22 +01:00
Gerwin Klein
b62417a292 libsel4/riscv: avoid gcc 14.2 miscompilation
a7 is not changed by seL4_Yield, so the original declaration is correct.

However, in some loops GCC 14.2 may drop the load to a7 if a7 or
memory are not declared as clobbered in the assembly block. This is a
problem if *other* code does write to a7. For some reason GCC 14.2 does
not recognise those other loads. GCC 14.3 and GCC 15 both work as
expected.

The problem manifests in SCHED0011 in sel4test.

This change works around the GCC 14.2 problem because GCC 14.2 is the
standard Debian trixie compiler and it is likely that people will hit
the problem even if we say that GCC 14.2 should not be used.

The workaround uses the same implementation of seL4_Yield as the Arm and
x86/x64 versions do: inline call to sys_null with an empty asm volatile
declaring memory as clobbered. The memory clobber declaration eliminates
the miscompilation, and overall the implementations are now consistent.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2026-05-08 08:45:52 +02:00
Bill Nguyen
daa0dfb147 manual: updated EPT invocations to make it clearer
...that these syscalls are only used to manage VCPU page tables.

Signed-off-by: Bill Nguyen <bill.nguyen@unsw.edu.au>
2026-04-28 08:22:34 +02:00
Bill Nguyen
79b104a3a1 manual: fix incorrect args desc for X86PageMapEPT
Fixed incorrect arguments descriptions for X86PageMapEPT, to make it
consistent with other invocations that take an EPT and guest physical
address such as X86EPTPTMap.

Signed-off-by: Bill Nguyen <bill.nguyen@unsw.edu.au>
2026-04-28 08:22:34 +02:00
yifei@zhan.science
19a520a22b Respect count in TCB_Write/ReadRegisters via loop
Previously TCB_WriteRegisters/ReadRegisters ignored the count parameter
and unconditionally copied the entire seL4_UserContext, this leads to
unnecessary overhead for VMM operations.

This addresses issue #1085

Signed-off-by: Yifei Zhan <yifei@zhan.science>
2026-04-11 13:58:22 +01:00
Indan Zupancic
27a52ddd4c Runtime Domain Schedules
Implementation of RFC-20.

Signed-off-by: Indan Zupancic <indan@nul.nu>
2026-03-24 15:03:39 +11:00
Julia Vassiliki
b5cc70d753 libsel4: make thread-local ipc buffer optional
At the moment, the seL4 microkit does not setup TLS variable
support. The workaround has been to `#define __thread` (blank)
before including `<sel4/sel4.h>` in `<microkit.h>`, which causes
issues if `<microkit.h>` is included *after* `<sel4/sel4.h>`,
often with obscure linker errors to `__emutls_**` symbols.

Instead we add a libsel4 config option that allows us to build
it with __thread copied out. We introduce an LIBSEL4_THREAD_LOCAL
macro in a similar way to the existing LIBSEL4_INLINE macro.

Signed-off-by: Julia Vassiliki <julia.vassiliki@unsw.edu.au>
2026-02-25 11:46:23 +00:00
Julia Vassiliki
b5d53702d4 trivial: adjust style for cmake-format
Signed-off-by: Julia Vassiliki <julia.vassiliki@unsw.edu.au>
2026-02-25 11:46:23 +00:00
Julia Vassiliki
c55f50b6e5 manual: correct alignment of IPC buffer
Not all platforms are 512-byte aligned. Specifically, 64-bit
platforms are 1024-byte byte aligned.

Signed-off-by: Julia Vassiliki <julia.vassiliki@unsw.edu.au>
2026-01-30 12:13:59 +00:00
Bill Nguyen
2bdafbf7c3 libsel4: fix attribute type for x86 EPT invocation
Signed-off-by: Bill Nguyen <bill.nguyen@student.unsw.edu.au>
2026-01-09 16:52:09 +11:00
Jakub Duchniewicz
2bef61b9da Fix style
Signed-off-by: Jakub Duchniewicz <j.duchniewicz@gmail.com>
2025-12-10 09:05:02 +11:00
Jakub Duchniewicz
51f571efce Add support for rock3b
Signed-off-by: Jakub Duchniewicz <j.duchniewicz@unsw.edu.au>
2025-12-10 09:05:02 +11:00
Bill Nguyen
704f80b9be libsel4: fix incorrect seL4_VMEnter() description
SEL4_VMENTER_CALL_CONTROL_ENTRY_MR refers to the
VM Entry Interruption-Information Field of the VMCS [1].
Not the VM-Entry Controls, which are two different things.

[1]: src/arch/x86/object/vcpu.c: vcpu_update_state_sysvmenter()

Signed-off-by: Bill Nguyen <bill.nguyen@student.unsw.edu.au>
2025-12-08 23:09:51 +00:00
Akif Ejaz
4f7d7b7376 Add support for the Banana Pi BPI-F3
Based on the SpacemiT K1 SoC

Signed-off-by: Akif Ejaz <akifejaz40@gmail.com>
2025-11-27 20:01:07 +01:00
Ivan Velickovic
11c5d50527 Fix TCB size for SMP + benchmark config
In the definition of tcb_t, there's extra fields if there's
SMP or BENCHMARK_TRACK_UTILISATION or ARM_HYPERIVSOR_SUPPORT.
It looks like the combination of all three (which Microkit uses)
is not enough for 11 bits.

Signed-off-by: Ivan Velickovic <i.velickovic@unsw.edu.au>
2025-11-24 17:03:56 +10:00
Gerwin Klein
19b78543f9 arm: complete SGI error conditions documentation
- add missing error codes and explanations
- add not on target check limitations

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2025-11-24 16:56:46 +11:00
Nick Spinale
1955a9bda1 rpi4: Fix memory layout for for aarch32
Reduce seL4_UserTop to make space for everything in the kernel's virtual
address space.

Signed-off-by: Nick Spinale <nick@nickspinale.com>
2025-11-21 17:37:27 +11:00
Indan Zupancic
3cbd3b2e95 SGI, GICv3: Fix plat_SGITargetValid
Otherwise it is not possible to send SGIs to all cores on platforms
with non-contiguous Affinity values or more than 16 cores.

16 is the limit of the target list, which is only relevant when
sending an SGI to multiple targets at once.

Update the API documentation to reflect what's actually happening.

Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-11-18 16:00:12 +11:00
julia
09e6c3f5e2 debug: invalidate ksKernelEntry on kernel exit
There's a few cases in the kernel where the ksKernelEntry tracking
is not perfect, such as in SError reporting, and (I believe) a few
other places which I haven't tracked down to a cause - but some of
e.g. the RISC-V trap code where the first entry faults and the 2nd
proceeds can report stale information.

In these cases, the kernel says that the entry was via a certain
syscall or interrupt (etc), even though that was clearly not the
case because we know the kernel exited. Now we will print out this:

    halting...
    Kernel entry via Unknown (0)

The changes:

- When exiting the kernel, via `c_exit_hook()`, reset
  `ksKernelEntry.path` to "Unknown".

  An alternative here would have been add a global "valid" boolean
  to the kernel state, but this requires modifying every site where
  we set the ksKernelEntry.path to also set valid = true, which is
  ugly.

- Remove Entry_UnimplementedDevice from entry_type_t as it is never
  used, to leave enough room to add Entry_Unknown.

- Switch out the CONFIG_DEBUG_BUILD || BENCHMARK TRACK ENTRIES #if
  in the x86 breakpoint code with the more concise
  `TRACK_KERNEL_ENTRIES` define used elsewhere.

Signed-off-by: julia <git.ts@trainwit.ch>
2025-08-20 15:57:58 +01:00
julia
1dde1fcb27 aarch64,vspace: deprecated PUD/PGD typedefs
This was missed in cb8ee83f0cd2268b1d6b1cd5ca30b031db5896c4; their
use was removed from syscall_stub_gen but their typedefs remained.

Signed-off-by: julia <git.ts@trainwit.ch>
2025-08-01 11:30:40 +01:00
Indan Zupancic
1415cac443 Add seL4_TCB_SetFlags Syscall
Add flags to tcb_t and the seL4_TCBFlag_fpuDisabled flag.

Enums are signed, make TCB flags word_t to make it unsigned.

Signed-off-by: Indan Zupancic <indan@nul.nu>
Signed-off-by: Corey Lewis <corey.lewis@proofcraft.systems>
2025-07-24 16:44:08 +10:00
Kent McLeod
34725d060b arm: Add new APIs for generating SGIs
Allow SGIs to be generated from non-SMP kernels.

Signed-off-by: Kent McLeod <kent@kry10.com>
Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2025-07-07 08:50:47 +10:00
julia
eca86cff19 treewide: typo fixes
Signed-off-by: julia <git.ts@trainwit.ch>
2025-04-14 12:05:16 +10:00
Ivan-Velickovic
58f0e87355 Add support for SiFive Premier P550 platform
The SiFive Premier P550 [1] is a new development board from SiFive
that is based on the ESWIN EIC7700X SoC.

The platform is interesting to the seL4 community as it implements
the RISC-V hypervisor extension meaning we now have real hardware to
evaluate RISC-V hypervisor changes to seL4. It also implements the
Sscofpmf extension and so we'll be able to get more experiment with
proper profiling on RISC-V.

Unfortunately, it seems we still do not have proper ASID suppor
according to [2].

The board comes in two configurations, 16GB and 32GB of memory.
This adds support for the 16GB model.

The DTS comes from SiFive's fork of Linux [3].
No modifications were made, any extra things are in the overlay.

[1]: https://www.sifive.com/boards/hifive-premier-p550
[2]: https://forums.sifive.com/t/asid-vmid-support-in-p550-eic7700x/6887
[3]: https://github.com/sifive/riscv-linux/tree/dev/kernel/hifive-premier-p550

Signed-off-by: Ivan-Velickovic <i.velickovic@unsw.edu.au>
2025-04-02 13:51:53 +11:00
Ryan Barry
9fe04a250b aarch32/vcpu: save and restore CNTKCTL
Save and restore the CNTKCTL register alongside other virtual timer
registers when switching VCPUs.

Signed-off-by: Ryan Barry <ryan.barry@proofcraft.systems>
2025-03-18 10:55:48 +11:00
Ryan Barry
f02bc94db8 arm: add vcpu save/restore reg range constants
This introduces two new constants to the vcpu reg enum, with the goal of
unifying reg range saves/restores and making explicit which registers
are affected.

Signed-off-by: Ryan Barry <ryan.barry@proofcraft.systems>
2025-03-13 09:46:12 +11:00
Ryan Barry
8e18a0b558 aarch64: avoid saving CPACR to a disabled VCPU
seL4_VCPUReg_CPACR was sometimes saved to an inactive current VCPU,
overwriting the previous value and erroneously enabling FPU access.

Signed-off-by: Ryan Barry <ryan.barry@proofcraft.systems>
2025-03-13 09:46:12 +11:00
Peter Chubb
e7bb62d2ce Bump minimum CMake version
Compatibility with versions <3.10 is going away.
As it happens, we're not using any CMake features that have changed
between 3.7 and 3.16, so bump the lowest version to 3.16.

Also remove the minimum version statement from the platform config
files --- they're all very simple files that are version independent;
and the version is checked elsewhere anyway.

Also, Fix style issue

A commit to fix style to make the PR go through.

Signed-off-by: Peter Chubb <Peter.Chubb@unsw.edu.au>
2025-02-26 17:11:57 +11:00
julia
7f91e0c5f6 libsel4: fix riscv ASIDcontrol param descriptions
Nowhere else in the documentation uses the phrase

    "Must be a depth of 32"

which seems incorrect for 64-bit riscv.

Also, the index parameter had the same description as root, which
is incorrect.

Signed-off-by: julia <git.ts@trainwit.ch>
2025-02-12 11:00:03 +00:00
Matt Rossouw
e8c070cd35 Added initial support for Cheshire platform
Signed-off-by: Matt Rossouw <matthew.rossouw@unsw.edu.au>
2025-02-03 16:10:58 +11:00
Indan Zupancic
b7ce213654 Add i.MX93 SoC support
Signed-off-by: Indan Zupancic <indan@nul.nu>
2024-12-18 16:41:44 +11:00
Ivan Velickovic
85aa104eb4 Fix TCB size on RISC-V 32-bit when FPU is enabled
This configuration is not in CI (hence why it lead to
a build error in the first place) so I just tested
it locally via sel4test with:

```
../init-build.sh -DPLATFORM=qemu-riscv-virt \
                 -DMCS=1 -DKernelRiscvExtD=1 \
                 -DKernelRiscvExtF=1 -DRISCV32=1
```

and it passed.

Signed-off-by: Ivan Velickovic <i.velickovic@unsw.edu.au>
2024-09-16 12:31:52 +01:00
Alwin Joshy
1253115999 hw debug api: aarch64 port
Adding support for the hardware debug API to
aarch64.

Signed-off-by: Alwin Joshy <joshyalwin@gmail.com>
2024-07-18 16:09:52 +10:00
Indan Zupancic
cae4662a45 manual: params don't have errors
Signed-off-by: Indan Zupancic <indan@nul.nu>
2024-06-30 21:14:32 +10:00
Nick Spinale
a3f6be3c7c libsel4: add links in place of renamed XML files
This commit's parent renames the interface XML files.

The symlinks added in this commit serve to ease the transition to the
new names for downstream projects.

These links are added:

- include/interfaces/{sel4.xml -> object-api.xml}
- arch_include/*/interfaces/{sel4arch.xml -> object-api-arch.xml}
- sel4_arch_include/*/interfaces/{
    sel4arch.xml -> object-api-sel4-arch.xml
  }

Signed-off-by: Nick Spinale <nick@nickspinale.com>
2024-06-30 18:28:12 +10:00
Nick Spinale
58fac368f3 trivial: Fix XML style
Signed-off-by: Nick Spinale <nick@nickspinale.com>
2024-06-30 18:28:12 +10:00
Nick Spinale
dbd6efc507 libsel4: rename interface XML files
Before, some object API XML files conflicted when the include,
arch_include, and sel4_arch_include directories were combined:

- include/interfaces/sel4.xml
- arch_include/*/interfaces/sel4arch.xml
- sel4_arch_include/*/interfaces/sel4arch.xml

This commit renames them to:

- include/interfaces/object-api.xml
- arch_include/*/interfaces/object-api-arch.xml
- sel4_arch_include/*/interfaces/object-api-sel4-arch.xml

Now, when the include, arch_include, and sel4_arch_include directories
are combined, we are left with:

- interfaces/object-api.xml
- interfaces/object-api-arch.xml
- interfaces/object-api-sel4-arch.xml

Signed-off-by: Nick Spinale <nick@nickspinale.com>
2024-06-30 18:28:12 +10:00
Nick Spinale
10bb153967 arm: add missing seL4_VPPIEvent_Length constants
Signed-off-by: Nick Spinale <nick@nickspinale.com>
2024-06-27 12:50:40 -04:00
hexcoder
15fa2cf9c2 manual: typos and style/grammar corrections
Co-authored-by: Gerwin Klein <gerwin.klein@proofcraft.systems>

Signed-off-by: hexcoder <heiko@hexco.de>
Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2024-06-17 19:24:20 +10:00
Indan Zupancic
8cbc13d5b8 Manual: Document ARM Virtualisation
This resolves issue #1083.

Signed-off-by: Indan Zupancic <indan@nul.nu>
2024-06-17 00:37:00 +01:00