In handleSyscall the current thread may be preempted to handle a pending interrupt.
With kernel mode interrupts in x86 this handling was delayed until we were about
to switch back to user mode. This change unifies the handling with ARM, where the
interrupt is handled prior to calling the thread scheduler.
Provides a mechanism where if af GP fault is potentially expected it can be caught
and the calling code returned to. The GP happening can be detected by setting
a specific return to handler and additionally by the return to handler being
cleared if a GP happened.
This commit allows x86 to completely handle a pending interrupt without switching
out to user mode. To handle an interrupt on x86 the APIC *must* generate an exception,
prior to you being able to acknowledge it. Previously we only allow exceptions (i.e.
interrupts) to be generated outside of kernel mode when we are in user mode.
This change allows us to 'poll' for an interrupt and transition the APIC whilst in kernel
mode by enabling and taking interrupts at carefully defined points. A pending interrupt
will be stored by the exception handler, allowing us to then handle the interrupt and
acknowledge the hardware APIC. Handling is done by waiting until after we have 'left' the
kernel and are about to switch to user mode and then 'entering' the kernel again by jumping
to the interrupt entry point.
Handling interrupts entirely in kernel mode provides two advantages
* It will allow, in the future, the ability to handle kernel interrupts in situations
where we need to handle the interrupt before actually performing the hardware switch
back to user mode. This case happens where the user thread is using vt-x and so
pending interrupts do not generate an interrupt exception, but rather cause an exception
to be generated telling the system that there is a pending interrupt
* Where there are multiple pending interrupts it is more efficient to avoid additional
switches in and out of the user thread
Whilst this change does not enable pre-emption points to handle the interrupt before
returning out of `handleSyscall` it should be easily implementable with what is provided.
The ARM_MPCORE configuration was added to capture which systems have the additional
ThreadID registers. This was an unneeded indirection as any arm version from v7 and
beyond has these registers. For the purposes of seL4 this means any arm version
except v6. This change scrubs ARM_MPCORE and replaces it with negated usages of
ARCH_ARM_V6. Additionally the IPC buffer config defaults were updated as the
ARM_MPCORE config was explicitly selecting the optimal one.
* commit 'be77963e5bb4c5c28ad3ebd8746c292e7b5876f6':
Define CONFIG_MAX_NUM_NODES and CONFIG_KERNEL_STACK_BITS in plat/autoconf.h
Unify kernel stack definition/declaration and share it between architecures/modes
Defines the vtd structures to be their full 52-bit size when in 64-bit mode by
making the hardware.bf per mode in the pc99 platform.
Updates some variables in iospace.c that were hard defined to be 32-bit
The vast majority of the DONT_TRANSLATE markers in the kernel are used
to hide __asm__ statements and builtin functions
(e.g. __builtin_unreachable ()) from the C-to-Isabelle parser.
The parser now supports underscore identifiers and many __asm__ statements,
and the builtin functions are prototyped, meaning the vast majority of the
DONT_TRANSLATE markers can be dropped. The remaining markers cover functions
that must be treated specially.
benchmark.h requires a definition of KS_LOG_PPTR, but its previous
placement in machine.h resulted in a circular include. This commit
factors out KS_LOG_PPTR and related definitions to a separate header,
creates the corresponding header for x86, and prevents circular
includes in the x86 builds
Defines the TLB bitmap to be located, virtually, just below the kernel
window. To get an initialized bitmap in each new address space we
change copyGlobalMappings to copy from USER_TOP (which includes the
initialized TLB bitmap in the global address space) instead of just
the kernel window base
statedata.h gets included from arch/machine.h, and statedata
does not require any of the machine.h definitions.
As a result of removing this various other, previously missing,
includes need to be added
This commit implements the body of SELFOUR-499. The API exposes the x86 DR0-7
and ARM coprocessor 14 features to userspace by virtualizing them as context-
switched registers in the TCB. Implemented as TCB invocations. This feature is
only built when CONFIG_HARDWARE_DEBUG_API is selected.
* Add low-level support routines for setting, unsetting, getting, enabling
and disabling breakpoints.
* Add support for single-stepping as well.
^ Single-stepping is not supported on ARMv6 since the hardware
doesn't have support.
^ ARM implements single-stepping as instruction breakpoints
configured to fault on every instruction -- this is achieved through
the "mismatch" mode, which is only supported from ARMv7 onwards.
* Also support explicit software break requests, a la "BKPT" and "INT $3".
* New invocations:
* seL4_TCB_SetBreakpoint().
* seL4_TCB_GetBreakpoint().
* seL4_TCB_UnsetBreakpoint().
* seL4_TCB_ConfigureSingleStepping().
* New constants:
^ Event types:
^ seL4_InstructionBreakpoint.
^ seL4_DataBreakpoint.
^ seL4_SoftwareBreakRequest.
^ Access types:
^ seL4_BreakOnRead.
^ seL4_BreakOnWrite.
^ seL4_BreakOnReadWrite.
^ Exports:
^ seL4_NumHWBreakpoints.
^ seL4_NumExclusiveBreakpoints.
^ seL4_NumExclusiveWatchpoints.
^ seL4_NumDualFunctionMonitors.
^ seL4_FirstBreakpoint.
^ seL4_FirstWatchpoint.
^ seL4_FirstDualFunctionMonitor.
See documentation in the seL4 API manual.
The TK1 manual's address map has a 16K MMIO region called the "Misc" region,
where they lump together several controllers that aren't all page aligned,
including a USB controller and a SATA controller of some kind.
They also lump the pinmux controller into this "misc" region, but the
pinmux controller is at a page aligned boundary, and has no other devices
sharing that page, so it can be split off into its own device untyped.
This also makes it easier to request that mapping from userspace.
- update core detection code and Kconfig file
- update kernel stack managment so that BSP does not use boot stack before IPI APs
- move arch dependant data to a single structure
- add cache line size to Kconfig
- add cpu indexing and apic id mapping
- boot APs to halting state
- add guard for kernel stack if there is only one core
* commit '8e77cdb5e91e971f49747492a3350c2b443a3827':
SELFOUR-421: Add padding for untyped in bootinfo
SELFOUR-421: minor changes for c-refine
SELFOUR-421: fix up boolean equality in Arch_sameObjectAs
SELFOUR-421: added device check to sameObjectAs
SELFOUR-421: Arch_createObject changed to use new user_data_device in ghostupdates for device pages
SELFOUR-421 Introduce explicit device frames and untypeds
Kernel objects cannot be created from device untypeds, with the
exception of frames, which do not get zeroed and cannot be used
as an IPC buffer. Device untypeds additionally cannot be used
in the construction of ASID pools.
This then changes the API to the rootserver (i.e. bootinfo) to
send device untypeds instead of device frames. On ARM these
device untypeds are the same as the previously exported device
frame regions. On x86 PCI scanning is removed and all physical
memory addresses (that are not important for kernel integrity)
are released to the user.
In order to have bits in the frame and untyped caps on ARM the
number of software ASIDs had to be reduced from 2^18 to 2^17,
and the maximum untyped size reduced from 2^31 to 2^30
* commit 'fbc071b4f11b3d7d423e26908a661f416b07cda2':
SELFOUR-630:preliminary booting application processors - update core detection code and Kconfig file - update kernel stack managment so that BSP does not use boot stack before IPI APs - move arch dependant data to a single structure - add cache line size to Kconfig - add cpu indexing and apic id mapping - boot APs to halting state - add guard for kernel stack if there is only one core
- update core detection code and Kconfig file
- update kernel stack managment so that BSP does not use boot stack before IPI APs
- move arch dependant data to a single structure
- add cache line size to Kconfig
- add cpu indexing and apic id mapping
- boot APs to halting state
- add guard for kernel stack if there is only one core
The first time the irq number is read from the controller, the interrupt
is acknowledged. Subsequent reads of the irq number result in an invalid
irq number being read.
This modifies the kzm interrupt controller driver to save the current irq
number when it's first read from the interrupt controller, preventing the
need for future reads from the controller until the next interrupt arrives.
Adds the following constants to libsel4
and uses them in the kernel.
seL4_SectionSize (arm)
seL4_SuperSectionSize (arm)
seL4_HugePageSize (x86 - pae)
seL4_LargePageSize (arm)
seL4_DataFault
seL4_InstructionFault
If an irq over max IRQ came in (unlikely) then it would result in an
array bounds over flow. gcc detected this as a result of the inlining of
the irq functions.
* rename physBaseMapping to BASE_OFFSET
* because physBaseMapping was only used explicity in a few places
* move duplicated arm definions up a level
- PPTR_TOP
- PADDR_TOP
- BASE_OFFSET
Inline non-boot irq functions called on the irq path.
This improves performance of interrupt paths through code locality.
Additionally, remove unused functions and use the BIT macro
rather than redefining it.
Previously looking up the page directory base for a SysteMMU was
done by writing the ASID into the hardware and reading out the
currently set page directory for that ASID. This is confusing for
verification so this commit introduces a global translation table
for converting an ASID to a page directory.
Benchmark feature that currently:
- Keeps track of system calls info
- Start time
- Duration
- Capability type
- Invocation tag
- Log the number of invocations of each system call*
- Log the number of invocations for each capability type per syscall.
- Has 3 new syscalls (dump, reset, get size).
- This new feature uses the existing log buffer (which is 1MiB for x86
and ARM). Since the number of syscall invocations is not
deterministic, the logged number of invocations is limited by the size
of the buffer. I suggested to enable the users to pass their own
user-level buffer, to enable more flexibility, later.
- ENABLE_BENCHMARKS is now a parent config option of trace points and
system call track features, they can't be used at the same time.
Originally building the kernel was largely considered to be done in
one of two ways
1. Release build with no assertions, no debug symbols and no printing.
This was generally considered to be a 'verified' build
2. Debug build with assertions, debug symbols and printing
Since then various options were added, such as the 'code injection'
option, which we wanted on builds that did not have assertions or
other options that affected performance. As such it did not depend
upon a debug build and had large warning signs saying that enabling
this in a release build would not give you a verified or trusted
kernel.
Most recently the ability to print from the kernel in release mode
was added. For the same reason that tying the ability to print with
the performance reduction of various debugging was not always desireable.
This change attempts to unify the current state and have a single top
level option to enable a 'verification friendly' build. All other
options (assertions, printing, code injection) then depend upon
this configuration not being set.
vcpu.c:
encapsulate inline assembly into inline functions that added to
device_pl2.h file.
other files:
replace #ifdef ARM_HYP with config_set(ARM_HYP)
vcpu.c:
encapsulate inline assembly into inline functions that added to
device_pl2.h file.
other files:
replace #ifdef ARM_HYP with config_set(ARM_HYP)
The functions pit_init and pit_wait_wraparound were previously marked as
PHYS_CODE, despite being called from BOOT_CODE elsewhere. This bug has
been present for some time but can be masked by the compiler inlining
all the involved functions, which is what typically happens.
Restructure the x86 interrupt handling to allow for a more flexible
method of using IOAPIC and MSI interrupts. The essence of this change
is to allow for the user to pick, for both IOAPIC and MSIs, which
CPU vector to use. Additionally there is future support, in the API,
for seL4 to eventually protect MSI interrupts with the vt-d interrupt
routing tables.
API behaviour for legacy systems using the PIC is preserved
Part of SELFOUR-281
This commit introduces the idea of a 'kpptr', which is simply an
address that is a kernel symbol. This allows for, in the future, to
have two different translations (between pointers and physical addresses)
one for kernel symbols, and one for other memory
Guarding code with #ifdef's makes even cursor testing of 'does this code compile'
difficult due to code being hidden by the pre-processor. Using config_set in
regular C if statements is performant as the compiler can trivially detect
dead code at compile time, and at -O1 and above will not even link in symbols
referenced by dead code in these blocks, so this will not bloat image size
Guarding code with #ifdef's makes even cursor testing of 'does this code compile'
difficult due to code being hidden by the pre-processor. Using config_set in
regular C if statements is performant as the compiler can trivially detect
dead code at compile time, and at -O1 and above will not even link in symbols
referenced by dead code in these blocks, so this will not bloat image size
* commit 'fc27f47f0cbaa72734f820160db768cbaac3a898':
x86: Move general x86 functions to common header
x86: Rename constants and functions to have X86 prefix instead of IA32 prefix
x86: Make parts of what have become 32-bit specific headers common
This definition is different to BASE_OFFSET in that it is only meant to
apply to the kernel image portion of the kernel window, and doesn't
assume that the entire window can be translated by a single offset
The reason these were not made common to begin with is so that there
was a commit that was just a rename of these files to make any merges
with other branches that might exist easier
directories
This commit is 'broken' as it leaves the repository in an unbuildable state.
The purpose of having this commit is so that there is a commit where the
modifications to these files is *just* a rename, making it easier to merge
these changes into other branches.
Configuring standalone kernel builds (such as those used by verification)
has been done in a completely different way to how the kernel is
configured for project builds. As the kernel gains additional options
it becomes difficult to maintain standalone kernel builds without
tediously exporting these additional options, such tedious work is
what autoconf.h is meant to address
The new configuration strategy requires a include/plat/PLAT/autoconf.h
file to exist for any platform that wants to hae standalone builds
performed on it. This configuration also becomes the *verified*
configuration, and makes it clear for projects to build the kernel
in the verified configuration.
This commit involves the PAE paging itself, refactoring the
vspace code to extra what is common between PAE and 32bit paging,
as well as some renaming to not call the root paging structure
a PD
The XU3 uses a 5422 which for seL4's purposes is almost the same as
the Odroid XU's 5410. Define a new PLAT_EXYNOS54XX to cover both.
Keep PLAT_EXYNOS5410 and ...5422 for the few places (not in the
kernel) where the difference matters.
